DSP56852PB View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

DSP56852PB

16-bit Digital Signal Processor

Motorola => Freescale 

Freescale Semiconductor, Inc.

Introduction

Part 3 Signals and Package Information

All digital inputs have a weak internal pull-up circuit associated with them. These pull-up circuits are

enabled by default. Exceptions:

1. When a pin has GPIO functionality, the pull-up may be disabled under software control.

2. Mode pins D13, D14 and D15 have no pull-up.

3. TCK has a weak pull-down circuit always active.

4. Bidirectional I/O pullups automatically disable when the output is enabled.

This table is presented consistently with the Signals Identified by Functional Group figure.

1. BOLD entries in the Type column represents the state of the pin just out of reset.

2. Ouput(Z) means an output in a High-Z condition.

Table 3. DSP56852 Signal and Package Information for the 81-pin MAPBGA

Pin No.

E1

J5

E9

D1

J4

F9

C1

H1

J7

G9

B9

A4

B1

G1

J6

J9

C9

A5

B5

B6

Signal Name

VDD

VDD

VDD

VSS

VSS

VSS

VDDIO

VDDIO

VDDIO

VDDIO

VDDIO

VDDIO

VSSIO

VSSIO

VSSIO

VSSIO

VSSIO

VSSIO

VDDA

VSSA

Type

VDD

VSS

VDDIO

VSSIO

VDDA

VSSA

Description

Logic Power —These pins provide power to the internal

structures of the chip, and should all be attached to VDD.

Logic Power - GND—These pins provide grounding for the

internal structures of the chip and should all be attached to

VSS.

I/O Power —These pins provide power for all I/O and ESD

structures of the chip, and should all be attached to VDDIO.

I/O Power - GND—These pins provide grounding for all I/O

and ESD structures of the chip and should all be attached to

VSS.

Analog Power—These pins supply an analog power source

Analog Ground—This pin supplies an analog ground.

DSP56852 Technical Data

7

Preliminary

For More Information On This Product,

Go to: www.freescale.com

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