I/O Circuit Format for Pins
Pin
PA0/PPO000/
PPO100
to
PA7/PPO007/
PPO107
PB0/PPO008/
PPO108
to
PB1/PPO009/
PPO109
10 pins
Port A
Port B
PPO0 data
PPO1 data
Port A or
Port B data
Data bus
RD
Circuit format
Output becomes active from Hi-Z by
writing data to port register.
CXP913040
When reset
Hi-Z
Port B
PB2/PPO010
to
PB7/PPO015
6 pins
PC0/PPO016
to
PC2/PPO018
PC3/RTO0
to
PC7/RTO4
8 pins
PPO0 data
Port B data
Data bus
RD
Port C
Output becomes active from Hi-Z by
writing data to port register.
PPO0 or RTO data
Port C data
"0" when reset Port C direction
Data bus
Port D
RD (Port C)
(Every bit)
Input protection
circuit
IP
Hi-Z
Hi-Z
PD0/KS0
to
PD7/KS7
8 pins
Port D data
"0" when reset Port D direction
Data bus
RD
Standby release
Port D standby
release data
Edge detection
–7–
∗
IP
(Every bit)
∗ Large current drive transistor
Hi-Z