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MCM72BA32SG50 View Datasheet(PDF) - Motorola => Freescale

Part Name
Description
Manufacturer
MCM72BA32SG50 Datasheet PDF : 14 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
256KB and 512KB BurstRAM
Secondary Cache Module for
Pentium
The MCM72BA32SG and MCM72BA64SG are designed to provide a burst-
able, high performance, 256K/512K L2 cache for the Pentium microprocessor.
The modules are configured as 32K x 72 and 64K x 72 bits in a 136 pin dual read-
out single inline memory module (DIMM). The module uses four of Motorola’s
MCM67B518 or MCM67B618 BiCMOS BurstRAMs.
Bursts can be initiated with either address status processor (ADSP) or address
status controller (ADSC). Subsequent burst addresses are generated internal to
the BurstRAM by the burst advance (ADV) input pin.
Write cycles are internally self timed and are initiated by the rising edge of the
clock (K) input. Eight write enables are provided for byte write control.
The cache family is designed to interface with popular Pentium cache control-
lers with on board TAG.
PD0 – PD2 are reserved for density and speed identification.
Pentium–style Burst Counter on Board
Dual Readout SIMM for Circuit Density
Single 5 V ± 5% Power Supply
All Inputs and Outputs are TTL Compatible
Three State Outputs
Byte Parity
Byte Write Capability
Fast Module Clock Rates: 66 MHz, 60 MHz, 50MHz
Decoupling Capacitors for each Fast Static RAM
High Quality Multi–Layer FR4 PWB With Separate Power and Ground Planes
I/Os are 3.3 V Compatible
Order this document
by MCM72BA32/D
MCM72BA32
MCM72BA64
136–LEAD DIMM
CASE 1104–01
TOP VIEW
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BurstRAM is a trademark of Motorola.
Pentium is a trademark of Intel Corp.
REV 2
5/95
M© OMoTtoOroRla,OInLc.A19F95AST SRAM
MCM72BA32MCM72BA64
1

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