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IDT79R465080MS View Datasheet(PDF) - Integrated Device Technology

Part Name
Description
Manufacturer
IDT79R465080MS
IDT
Integrated Device Technology IDT
IDT79R465080MS Datasheet PDF : 22 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
IDT79R4650
COMMERCIAL TEMPERATURE RANGE
AC ELECTRICAL CHARACTERISTICS — COMMERCIAL TEMPERATURE RANGE—R4650
(VCC=5.0V ± 5%; TCASE = 0°C to +85°C)
Clock Parameters—R4650
R4650
80MHz
R4650
100MHz
R4650
133MHz
Parameter
Symbol Test Conditions Min Max Min Max Min Max Units
Pipeline clock frequency
PClk
50
80
50
100
50
133 MHz
MasterClock HIGH
MasterClock LOW
MasterClock Frequency(5)
tMCHIGH
tMCLOW
Transition 5ns
Transition 5ns
6
4
3
— ns
6
4
3
— ns
20
40
25
50
25
67 MHz
MasterClock Period
tMCP
25
Clock Jitter for MasterClock tJitterIn(8)
MasterClock Rise Time
tMCRise(8)
MasterClock Fall Time
tMCFall(8)
ModeClock Period
tModeCKP
NOTES:
5. Operation of the R4650 is only guaranteed with the Phase Lock Loop enabled.
6. Timings are measured from 1.5V of the clock to 1.5V of the signal.
7. Capacitive load for all output timings is 50pF.
8. Guaranteed by Design.
9. Typical integer instruction mix and cache miss rates.
System Interface Parameters—R4650(6)
40
20
±250 —
5
5
256* —
tMCP
40
15
±250 —
5
5
256* —
tMCP
40 ns
±250 ps
4 ns
4 ns
256* ns
tMCP
R4650
80MHz
R4650
100MHz
R4650
133MHz
Parameter
Symbol
Test Conditions
Data Output(7)
tDM= Min
tDO = Max
mode14..13 = 10 (fastest)
mode14..13 = 01 (slowest)
Data Output Hold tDOH *
mode14..13 = 10 (fastest)
Data Setup
tDS
Data Hold
tDH
trise = 5ns
tfall = 5ns
* 25pf loading on external putput signals, fastest settings
Min Max Min Max Min Max Units
1.0
11
1.0
9
1.0
9 ns
2.0
15
2.0
12
2.0
12 ns
1.0
1.0
1.0
— ns
7
6
6
— ns
4
3
3
— ns
Boot Time Interface Parameters—R4650
R4650
80MHz
R4650
100MHz
R4650
133MHz
Parameter
Mode Data Setup
Symbol
tDS
Test Conditions
Min Max Min Max Min Max
Units
3
3
3
— Master Clock Cycle
5.8
16

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