IDT79R4650100MS(1996) View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

Manufacturer

IDT79R4650100MS
(Rev.:1996)

EMBEDDED 64-BIT ORION™ RISC MICROPROCESSOR

Integrated Device Technology 

Integrated Device Technology, Inc.

EMBEDDED

64-BIT ORION™ RISC

MICROPROCESSOR

IDT79R4650™

IDT79RV4650 ™

FEATURES

• High-performance embedded 64-bit microprocessor

- 64-bit integer operations

- 64-bit registers

- 80MHz, 100MHz, 133MHz operation frequency

• High-performance DSP capability

- 66.7 Million Integer Multiply-Accumulate Operations/

sec @ 133 MHz

- 44 MFlops floating point operations @133MHz

• High-performance microprocessor

- 133 MIPS at 133MHz

- 66.7 M Mul-Add/second at 133MHz

- 44 MFLOP/s at 133MHz

- >300,000 dhrystone (2.1)/sec capability at 133MHz

(175 dhrystone MIPS)

• High level of integration

- 64-bit, 133 MIPS integer CPU

- 44MFlops Single precision floating-point unit

- 8KB instruction cache; 8KB data cache

- Integer multiply unit with 66.7M Mul-Add/sec

• Low-power operation

- Active power management powers-down inactive units

- Standby mode

• Upward software compatible with IDT RISController Family

• Large, efficient on-chip caches

- Separate 8kB Instruction and 8kB Data caches

- Over 1500MB/sec bandwidth from internal caches

- 2-set associative

- Write-back and write-through support

- Cache locking to facilitate deterministic response

• Bus compatible with ORION family

- System interfaces to 67 MHz, provides bandwidth up to

533 MB/S

- Direct interface to 32-bit wide or 64-bit wide systems

- Synchronized to external reference clock for multi-master

operation

• Improved real-time support

- Fast interrupt decode

- Optional cache locking

BLOCK DIAGRAM:

133 MIPS 64-bit ORION CPU

64-bit register file

64-bit adder

Load aligner

Store Aligner

Logic Unit

High-Performance

Integer Multiply

System Control Coprocessor 44MFLOPS Single-Precision FPA

Address Translation/

Cache Attribute Control

FP register file

Exception Management

Functions

Pack/Unpack

FP Add/Sub/Cvt/

Div/Sqrt

FP Multiply

Control Bus

Instruction Bus

Data Bus

Instruction Cache

Set A

(Lockable)

Instruction Cache

Set B

32-/64-bit

Synchronized

System Interface

Data Cache

Set A

(Lockable)

Data Cache

Set B

The IDT logo is a registered trademark and ORION, R4650, RV4650, R4600, R3081, R3052, R3051, R3041, RISController, and RISCore are trademarks of Integrated Device Technology, Inc.

COMMERCIAL TEMPERATURE RANGE

© 1996 Integrated Device Technology, Inc.

5.8

MARCH 1996

DSC3149/2

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