IDT79R4650-200DP View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
Manufacturer
IDT79R4650-200DP Datasheet PDF : 25 Pages
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IDT79RC4650™
AC electrical Characteristics — Commercial Temperature Range—R4650
(VCC=5.0V ± 5%; TCASE = -0°C to +85°C)
Clock Parameters—R4650
Parameter
Symbol Test Conditions
R4650
100MHz
Min Max
Pipeline clock frequency
PClk
—
50
100
MasterClock HIGH
MasterClock LOW
MasterClock Frequency1
MasterClock Period
Clock Jitter for MasterClock
MasterClock Rise Time
MasterClock Fall Time
ModeClock Period
tMCHIGH
tMCLOW
—
tMCP
tJitterIn2
tMCRise2
tMCFall2
tModeCKP2
Transition ≤ tMCRise/Fall 4
Transition ≤ tMCRise/Fall 4
—
25
—
20
—
—
—
—
—
—
—
—
1. Operation of the RC4650 is only guaranteed with the Phase Lock Loop enabled.
2. Guaranteed by design.
—
—
50
40
±250
5
5
256*
tMCP
R4650
133MHz
Min
50
3
3
25
15
—
—
—
—
Max
133
—
—
67
40
±250
4
4
256*
tMCP
Units
MHz
ns
ns
MHz
ns
ps
ns
ns
ns
System Interface Parameters—R4650
(VCC=5.0V ± 5%; TCASE = 0°C to +85°C)
Note: Timings are measured from 1.5V of the clock to 1.5V of the signal.
Parameter
Symbol
Test Conditions
Data Output1
tDO = Max
mode14..13 = 10 (fastest)
mode14..13 = 11 (85%)
mode14..13 = 00 (66%)
Data Output Hold
tDOH3
mode14..13 = 01 (slowest)
mode14..13 = 10
mode14..13 = 11
mode14..13 = 00
mode14..13 = 01
Input Data Setup
tDS
Input Data Hold
tDH
trise = 5ns
tfall = 5ns
1. Capacitive load for all output timings is 50pF.
2. Guaranteed by design.
3. 50pf loading on external output signals, fastest settings
R4650
100MHz
Min
02
02
02
02
0
0
0
0
5.5
2
Max
9
12
—
—
—
—
—
—
R4650
133MHz
Min
02
02
02
02
0
0
0
0
4.5
1.5
Max
9
12
—
—
—
—
—
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
14 of 25
April 10, 2001
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