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TX4925 View Datasheet(PDF) - Toshiba

Part Name
Description
Manufacturer
TX4925 Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
INTEGRATED CIRCUIT
TOSHIBA RISC PROCESSOR
TMPR4925XB
TENTATIVE
n Interrupt Controller ( IRC )
The TX4925 contains an interrupt controller, which receives interrupt requests sent by both
the TX4925’s built-in peripherals and external devices and issues interrupt requests to the
TX49/H2 core. It has a 32-bit flag register to generate interrupt requests to external devices
or the TX49/H2 core.
Supports 21 internal interrupt sources from built-in peripherals and 8 external interrupt
signal inputs
8 interrupt priority levels for each interrupt source
Supports selection between edge- and level-triggered interrupt detection for each
external interrupt
32-bit read / write flag register for interrupt requests, making it possible to issue interrupt
request to external devices and to the TX49/H2 core ( IRC interrupts )
n high-speed serial Concentration Highway Interface ( CHI )
The TX4925 has a high-speed serial Concentration Highway Interface.
Contents logic for interfacing to external full-duplex serial time-division-multiplexed (TDM)
communication peripherals
Supports ISDN line interface chips and other PCM/TDM serial devices
Programmable CHI Interface (numbers of channels, frame rate, bit rate, etc.)
supports data rates up to 4.096Mbps
n Serial Peripheral Interface ( SPI )
The TX4925 has a Serial Peripheral Interface.
full-duplex, synchronous serial data transfers (data in/out, and clock signals)
8-bit or 16-bit data word lengths
Programmable SPI baud rate
n NAND Flash memory Controller ( NDFMC )
The TX4925 has a NAND Flash memory Controller.
Controlled NAND Flash I/F by Setting Register
Supports ECC (Error Correct Circuit) control flow
EJC-TMPR4925XB -8
26/Dec/01 Rev 0.1
TOSHIBA CORPORATION

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