LH28F008SC View Datasheet(PDF) - Sharp Electronics

Part Name

Description

Manufacturer

LH28F008SC

8M (1M × 8) Flash Memory

Sharp Electronics 

8M (1M × 8) Flash Memory

LH28F008SC

DQ0 - DQ7

OUTPUT

BUFFER

INPUT

BUFFER

OUTPUT

MULTIPLEXER

IDENTIFIER

REGISTER

STATUS

REGISTER

DATA

REGISTER

I/O LOGIC

RP

A0 - A19

INPUT

BUFFER

ADDRESS

LATCH

ADDRESS

COUNTER

Y-DECODER

X-DECODER

DATA

COMPARATOR

Y-GATING

16 64KB BLOCKS

CE

COMMAND

WE

REGISTER

OE

RP

WRITE STATE

MACHINE

RY/BY

PROGRAM/

ERASE

VOLTAGE

SWITCH

VPP

VCC

GND

Figure 4. LH28F008SC Block Diagram

28F008SC-3

Internal VCC and VPP detection Circuitry automati-

cally configures the device for optimized read and write

operations.

A Command User Interface (CUI) serves as the in-

terface between the system processor and internal op-

eration of the device. A valid command sequence written

to the CUI initiates device automation. An InternalWrite

State Machine (WSM) automatically executes the algo-

rithms and timings necessary for block erase, byte write,

and lock-bit configuration operations.

A block erase operation erases one of the device’s

64K blocks typically within 1 second (5V VCC, 12V VPP)

independent of other blocks. Each block can be inde-

pendently erased 100,000 times (1.6 million block erases

per device). Block erase suspend mode allows system

software to suspend block erase to read or write data

from any other block.

Writing memory data is performed in byte increments

typically within 6 µs (5 V VCC, 12 V VPP). Byte write sus-

pend mode enables the system to read data or execute

code from any other flash memory array location.

Individual block locking uses a combination of bits,

sixteen block lock-bits and a master lock-bit, to lock and

unlock blocks. Block lock-bits gate block erase and byte

write operations, while the master lock-bit gates block

lock-bit modification. Lock-bit configuration operations

(Set Block, Lock-Bit, Set Master Lock-Bit, and Clear

Block Lock-Bits commands) set and cleared lock-bits.

The status register indicates when the WSM’s block

erase, byte write, or lock-bit configuration operation is

finished.

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