ADSP-BF518KSWZ-ENG View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADSP-BF518KSWZ-ENG Datasheet PDF : 62 Pages
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ADSP-BF512/BF514/BF516/BF518 (F)
TABLE OF CONTENTS
General Description ................................................. 3
Portable Low-Power Architecture ............................. 3
System Integration ................................................ 3
Processor Peripherals ............................................. 3
Blackfin Processor Core .......................................... 3
Memory Architecture ............................................ 5
DMA Controllers .................................................. 9
Real-Time Clock ................................................... 9
Watchdog Timer ................................................ 10
Timers ............................................................. 10
3-phase PWM .................................................... 10
General-Purpose (GP) Counter .............................. 11
Serial Ports ........................................................ 11
Serial Peripheral Interface (SPI) Ports ...................... 11
UART Ports ...................................................... 11
TWI Controller Interface ...................................... 12
RSI Interface ...................................................... 12
10/100 Ethernet MAC .......................................... 12
IEEE 1588 Support .............................................. 13
Ports ................................................................ 13
Parallel Peripheral Interface (PPI) ........................... 14
Code Security with Lockbox Secure Technology ......... 14
Dynamic Power Management ................................ 14
Voltage Regulation Interface .................................. 16
Clock Signals ..................................................... 16
REVISION HISTORY
03/09—Revision PrE:
Numerous small clarifications and corrections throughout
document.
Updated 176-lead LQFP package outline, clarifying location of
exposed pad on bottom of package........................ Page 60
Preliminary Technical Data
Booting Modes ................................................... 17
Instruction Set Description .................................... 18
Development Tools .............................................. 18
Designing an Emulator-Compatible
Processor Board (Target) ................................... 19
Related Documents .............................................. 19
Lockbox Secure Technology Disclaimer .................... 19
Signal Descriptions ................................................. 20
Specifications ........................................................ 23
Operating Conditions ........................................... 23
Electrical Characteristics ....................................... 25
Absolute Maximum Ratings ................................... 26
Package Information ............................................ 26
ESD Sensitivity ................................................... 26
Timing Specifications ........................................... 27
Output Drive Currents ......................................... 49
Power Dissipation ............................................... 51
Test Conditions .................................................. 51
Thermal Characteristics ........................................ 54
176-Lead LQFP Lead Assignment ............................... 55
168-Ball CSP_BGA Ball assignment ............................ 57
Outline Dimensions ................................................ 60
Surface Mount Design .......................................... 61
Ordering Guide ..................................................... 62
Rev. PrE | Page 2 of 62 | March 2009
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