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ADSP-BF527C(RevPrC) View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADSP-BF527C
(Rev.:RevPrC)
ADI
Analog Devices ADI
ADSP-BF527C Datasheet PDF : 44 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADSP-BF523C/ADSP-BF525C/ADSP-BF527C
Preliminary Technical Data
Digital Filter Characteristics on Page 39. The filter types are
automatically configured depending on the sample rate chosen.
See USB Mode Sample Rates on Page 23 more details.
When the high-pass filter is enabled the dc offset is continu-
ously calculated and subtracted from the input signal. By setting
HPOR, the last calculated dc offset value is stored when the
high-pass filter is disabled and will continue to be subtracted
from the input signal. If the dc offset changes, the stored and
subtracted value will not change unless the high-pass filter is
enabled. The software control is shown in Table 4.
Table 4. ADC Software Control
Register Bit Label Default Description
Address
000 0101 0 ADCHPD 0
ADC High Pass Filter Enable
1 = Disable High Pass Filter
0 = Enable High Pass Filter
4 HPOR 0
Store DC Offset
When High Pass Filter Disabled
1 = Store Offset
0 = Clear Offset
DAC Filters
The DAC filters perform true 24-bit signal processing to con-
vert the incoming digital audio data from the digital audio
interface at the specified sample rate to multi-bit oversampled
data for processing by the analog DAC. Figure 10 illustrates the
DAC digital filter path.
FROM DIGITAL
AUDIO INTERFACE
DIGITAL
DE EMPHASIS
MUTE
DIGITAL
INTERPOLATION
FILTER
TO LINE
OUTPUTS
DEEMP
DACMU
Figure 10. DAC Filter
The DAC digital filter can apply digital de-emphasis under soft-
ware control, as shown in Table 5. The DAC can also perform a
soft mute where the audio data is digitally brought to a mute
level. This removes any abrupt step changes in the audio that
might otherwise result in audible clicks in the audio outputs.
Table 5. DAC Software Control
Register Bit Label
Address
Default Description
000 0101 2:1 DEEMP[1:0] 00
De-emphasis Control (Digital)
11 = 48 kHz
10 = 44.1 kHz
01 = 32 kHz
00 = Disable
3 DACMU 1
DAC Soft Mute Control (Digital)
1 = Enable Soft Mute
0 = Disable Soft Mute
DAC
The CODEC uses a multi-bit sigma-delta oversampling digital-
to-analog converter as shown in Figure 11.
FROM DAC
DIGITAL
FILTERS
TO LINE OUTPUT
Figure 11. Multi-bit Oversampling Sigma Delta Schematic
The DAC converts the multi-level digital audio data stream
from the DAC digital filters into high quality analog audio.
Line Outputs
The CODEC provides two low impedance line outputs LOUT
and ROUT, suitable for driving line loads with 10 kΩ imped-
ance and 50 pF capacitance. The line output is used to
selectively sum the outputs from the DAC and/or the line inputs
in bypass mode.
The LOUT and ROUT outputs are only available at a fixed line
output level that is not adjustable in the analog domain. The
level is fixed such that at the DAC full scale level the output is
1.0 V(rms) at AVDD = 3.3 volts. The DAC full scale level tracks
directly with AVDD.
The internal circuit is shown in Figure 12. The line output
includes a low order audio low pass filter for removing out-of
band components from the sigma-delta DAC. Therefore no fur-
ther external filtering is required in most applications.
FROM
MICROPHONE
INPUT
SIDETONE
FROM
LINE
INPUTS
BYPASS
FROM
DAC
DACSEL
-
VMID
+
LINEOUT
Figure 12. Line Output
TO HEADPHONE
AMPLIFIER
The DAC output, line input and microphone are summed into
the line output. In DAC mode only the output from the DAC is
routed to the line outputs. In bypass mode the line input is
summed into the line outputs. In sidetone mode the micro-
phone input is summed into the line output. These features can
Rev. PrC | Page 10 of 44 | June 2008

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