AT26DF081A-SU View Datasheet(PDF) - Unspecified
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AT26DF081A-SU Datasheet PDF : 41 Pages
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AT26DF081A
Table 6-1. Command Listing
Command
Opcode
Address Bytes Dummy Bytes
Data Bytes
Read Commands
Read Array
0Bh
0000 1011
3
1
1+
Read Array (Low Frequency)
03h
0000 0011
3
0
1+
Program and Erase Commands
Block Erase (4 Kbytes)
20h
0010 0000
3
0
0
Block Erase (32 Kbytes)
52h
0101 0010
3
0
0
Block Erase (64 Kbytes)
D8h
1101 1000
3
0
0
Chip Erase
60h
0110 0000
0
0
0
C7h
1100 0111
0
0
0
Byte/Page Program (1 to 256 Bytes)
02h
0000 0010
3
0
1+
Sequential Program Mode
ADh
1010 1101
3, 0(1)
0
1
AFh
1010 1111
3, 0(1)
0
1
Protection Commands
Write Enable
06h
0000 0110
0
0
0
Write Disable
04h
0000 0100
0
0
0
Protect Sector
36h
0011 0110
3
0
0
Unprotect Sector
39h
0011 1001
3
0
0
Global Protect/Unprotect
Use Write Status Register command
Read Sector Protection Registers
3Ch
0011 1100
3
0
1+
Status Register Commands
Read Status Register
05h
0000 0101
0
0
1+
Write Status Register
01h
0000 0001
0
0
1
Miscellaneous Commands
Read Manufacturer and Device ID
9Fh
1001 1111
0
0
1 to 4
Deep Power-down
B9h
1011 1001
0
0
0
Resume from Deep Power-down
ABh
1010 1011
0
0
0
Note:
1. Three address bytes are only required for the first operation to designate the address to start programming at. Afterwards,
the internal address counter automatically increments, so subsequent Sequential Program Mode operations only require
clocking in of the opcode and the data byte until the Sequential Program Mode has been exited.
7
3600I–DFLASH–5/2013
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