PMS133-H20 View Datasheet(PDF) - Unspecified
Part Name
Description
Manufacturer
PMS133-H20 Datasheet PDF : 106 Pages
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PMS133/PMS134
8bit OTP MCU with 12-bit ADC
9. Open 32KHz EOSC mode
10. Amend Table 2: Three oscillation circuits
11. Amend Section 5.4.1 Internal High RC oscillator and Internal Low RC oscillator
12. Amend Section 5.4.5: System Clock and LVR level
13. Amend Fig.4: Hardware diagram of comparator
14. Amend Section 5.5.2: Using the comparator
15. Amend Section 5.5.3: Using the comparator and band-gap 1.20V
16. Amend Section 5.7: 16-bit Timer(Timer16)
17. Amend Section 5.8: 8-bit Timer (Timer2/Timer3) with PWM generation
18. Add Fig.13: Comparator controls the output of PWM waveform
19. Amend Fig.15: Hardware Diagram of 11-bit PWM Generator
20. Amend Section 5.9.3: Equations for 11-bit PWM Generator
21. Amend Section 5.11: Interrupt
22. Amend Section 5.12.1: Power-Save mode
23. Amend Section 5.12.2: Power- Down mode
24. Amend Section 5.12.3: Wake-up
25. Amend Table 6: Differences in wake-up sources between Power-Save mode
and Power-Down mode
26. Amend Section 5.15: Analog-to-Digital Conversion (ADC) module
27. Amend Fig.21: Analog Input Model
28. Amend Section 6.2: Stack Pointer Register
29. Amend Section 6.23: ADC Control Register
30. Amend Section 6.35: Timer3 Control Register
31. Amend Section 6.39: PWMG0 control Register
32. Amend Section 6.40: PWMG0 Scalar Register
33. Amend Section 6.44: PWMG0 Counter Upper Bound Low Register
34. Amend Section 6.45: PWMG1 control Register
35. Amend Section 6.46: PWMG1 Scalar Register
36. Amend Section 6.47: PWMG1 Duty Value High Register
37. Amend Section 6.49: PWMG1 Counter Upper Bound High Register
38. Amend Section 6.50: PWMG1 Counter Upper Bound Low Register
39. Amend Section 6.51: PWMG2 control Register
40. Amend Section 6.52: PWMG2 Scalar Register
41. Amend Section 6.53: PWMG2 Duty Value High Register
42. Amend Section 6.55: PWMG2 Counter Upper Bound High Register
43. Amend Section 6.56: PWMG2 Counter Upper Bound Low Register
44. Delete the Symbol “pc0” in Chapter 7
45. Add 7 Instructions: “nmov M, a”, “nmov a, M”, “ldtabh index”, “ldtabl index”,
“idxm a, index”, “swap M” and “xor a, IO”
46. Amend Section 7.8 Summary of Instructions Execution Cycle and delete 9.2.8
47. Move Section 9.2.9 BIT definition to Section 7.10
48. Amend Chapter 8 Code Options
49. Updated the link in Section 9.1
50. Amend Section 9.2.1: IO pin usage and setting
51. Amend Section 9.2.5: TIMER time out
52. Amend Section 9.2.8: Programming Writing
53. Amend Section 9.3: Using ICE
©Copyright 2018, PADAUK Technology Co. Ltd
Page 9 of 106 PDK-DS-PMS133/134-EN_V103 – Nov. 13, 2018
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