PMS132-S14 View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

PMS132-S14

8bit OTP MCU with 12-bit ADC

Unspecified 

PMS132/PMS132B

8bit OTP MCU with 12-bit ADC

Revision History:

Revision

Date

Description

0.00 2016/08/08 Preliminary version

1. Revise Chapter 3: Pin Assignment and Description

2. Revise Section 5.8.2: Hardware and Timing Diagram

0.01 2016/12/01 3. Revise Section 5.8.3: Frequency of PWM Output

4. Add Section 5.8: 11-bit PWM Generator Functional Description

5. Add Section 6.43~6.51: IO Registers

1. Revise Section 1.2 System Features

2. Add Section 1.4 Package Information

3. Revise Chapter 2 General Description and Block Diagram

4. Add Chapter 3 Pin Assignment and Description:PMS132/PMS132B-S08,

PMS132/PMS132B-U06

5. Revise Section 4.1 AC/DC Device Characteristics: “VIL” and “VIH”

6. Revise Section 4.3 Typical ILRC frequency vs. VDD and temperature

7. Revise Section 4.4 Typical IHRC frequency deviation vs. VDD

8. Revise Section 4.5 Typical ILRC Frequency vs. Temperature

9. Revise Section 4.6 Typical IHRC Frequency vs. Temperature

10. Revise Section 4.7 Typical operating current vs. VDD @ system clock = ILRC/n

11. Revise Section 4.8 Typical operating current vs. VDD @ system clock = IHRC/n

12. Revise Section 4.9 Typical operating current vs.VDD@system clock=4MHz EOSC / n

13. Revise Section 4.10 Typical operating current vs.VDD@system clock=32KHz EOSC / n

14. Revise Section 4.11 Typical operating current vs.VDD@system clock=1MHz EOSC / n

15. Revise Section 4.12 Typical IO driving current (IOH) and sink current (IOL)

16. Revise Section 4.13 Typical IO input high/low threshold voltage (VIH/VIL)

17. Revise Section 4.14 Typical resistance of IO pull high device

18. Add Section 4.15 Typical power down current (IPD) and power save current (IPS)

19. Revise Section 5.1 Program Memory - OTP

20. Revise Table 2: Three oscillation circuits

21. Revise Section 5.4.3 IHRC Frequency Calibration and System Clock

22. Revise Section 5.4.4 External Crystal Oscillator

0.02 2017/11/23 23. Revise Fig. 3: Options of System Clock

24. Revise Section 5.5.2 Using the comparator

25. Revise Section 5.6 16-bit Timer

26. Revise Section 5.8 11-bit PWM Generator

27. Revise Section 5.11.1 Power-Save mode

28. Revise Fig. 20: ADC Block Diagram

29. Revise Section 5.14.4 Configure the analog pin

30. Revise Section 5.14.5 Using the ADC

31. Revise Section 6.3 Clock Mode Register

32. Revise Section 6.4 Interrupt Enable Register

33. Revise Section 6.5 Interrupt Request Register

34. Revise Section 6.11 Port A Digital Input Enable Register

35. Revise Section 6.12 Port B Digital Input Enable Register

36. Delete Section 6.13 MISC2 Register

37. Revise Section 6.21 Comparator Control Register

38. Revise Section 6.28 PWMG0 control Register

39. Revise Section 6.29 PWMG0 Counter Upper Bound High Register

40. Revise Section 6.30 PWMG0 Counter Upper Bound Low Register

41. Revise Section 6.31 PWMG0 Duty Value High Register

42. Revise Section 6.32 PWMG0 Duty Value Low Register

43. Revise Section 6.38 ADC Control Register

44. Revise Section 6.40 ADC Regulator Control Register

45. Revise Section 6.43 PWMG1 control Register

46. Revise Section 6.49 PWMG2 control Register

©Copyright 2020, PADAUK Technology Co. Ltd

Page 7 of 100

PDK-DS-PMS132(B)-EN_V104 – Jun. 2, 2020

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