LC72700 View Datasheet(PDF) - SANYO -> Panasonic
Part Name
Description
Manufacturer
LC72700 Datasheet PDF : 14 Pages
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LC72700E, LC72700G
PORT2 PORT1 PORT0
Item
0
0
0
Allowed error count
0
0
1
Block error protection
count
0
1
0
Frame error protection
count
0
1
1
Error correction initial
threshold value
1
0
0
Readout block no.
Upper 4 bits
Lower 4 bits
Upper 4 bits
Lower 4 bits
Upper 4 bits
Lower 4 bits
Upper 4 bits
Lower 3 bits
0 to 189 (8 bits)
Set data
Back allowed errors
Forward allowed errors
Back protection count
Forward protection count
Back protection count
Forward protection count
—
Initial threshold value
4. Control Data Timing in Parallel Mode
PORT0 to 2
DAT0 to 7
PST
DAT pin I/O
direction
Output
Register set
Input data
<Input direction>
tps ≥ 300 ns
Output
500 to 800 ns
Default value
2
2
1
7
1
7
—
7
0
Handling Pins for the Unused Mode when the CPU Interface is Specified
1. When Serial Mode is Specified
Pin
PST
PORT0 to 2
DATA0 to 7
RDY
RDY0
RE
Pin No.
(37)
(38 to 40)
(13 to 20)
(26)
(27)
(25)
Pin state
Pull-up resistor input
Pull-up resistor input
Output direction (fixed at the low level)
Fixed at a high-level output
Fixed at a high-level output
Pull-up resistor input
Handling
Leave open or connect to the power-supply (VDD)
Leave open or connect to the power-supply (VDD)
Leave open
Leave open
Leave open
Leave open or connect to the power-supply (VDD)
2. When Parallel Mode is Specified
Pin
CL
CE
DI
DO
Pin No.
(29)
(30)
(31)
(32)
Input pin
Pin state
Input pin
Input pin
Open-drain output in the off state
Handling
Connect to the power supply or ground
Connect to the power supply or ground
Connect to the power supply or ground
Connect to ground
Note:** 1. The data values shown above are for the state immediately following a reset operation.
2. The INT-R pin (pin 35) signal is always output regardless of the mode.
3. Since the S/P pin (pin 42) has a built-in pull-up resistor, serial mode will be selected if it is left open.
No. 4870-9/14
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