DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

3D7501 View Datasheet(PDF) - Data Delay Devices

Part Name
Description
Manufacturer
3D7501
Data-Delay-Devices
Data Delay Devices Data-Delay-Devices
3D7501 Datasheet PDF : 4 Pages
1 2 3 4
MONOLITHIC MANCHESTER
DECODER
(SERIES 3D7502)
3D7502
data
delay
3
®
devices, inc.
FEATURES
All-silicon, low-power CMOS
technology
TTL/CMOS compatible inputs and
outputs
Vapor phase, IR and wave
solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Maximum data rate: 50 MBaud
Data rate range: ±15%
PACKAGES
RX 1
CLK 2
N/C 3
GND 4
8 VDD
7 N/C
6 N/C
5 DATB
3D7502M-xxx DIP (.300)
3D7502H-xxx Gull Wing (.300)
3D7502Z-xxx SOIC (.150)
RX 1 14 VDD
N/C 2 13 N/C
N/C 3 12 N/C
CLK 4 11 N/C
N/C 5 10 N/C
N/C 6 9 N/C
GND 7 8 DATB
3D7502-xxx DIP (.300)
3D7502G-xxx Gull Wing (.300)
3D7502D-xxx SOIC (.150)
FUNCTIONAL DESCRIPTION
PIN DESCRIPTIONS
The 3D7502 product family consists of monolithic CMOS Manchester
Decoders. The unit accepts at the RX input a bi-phase-level,
embedded-clock signal. In this encoding mode, a logic one is
represented by a high-to-low transition within the bit cell, while a logic
zero is represented by a low-to-high transition. The recovered clock
and data signals are presented on CLK and DATB, respectively, with
RX
CLK
DATB
VCC
GND
Signal Input
Signal Output (Clock)
Signal Output (Data)
+5 Volts
Ground
the data signal inverted. The operating baud rate (in MBaud) is specified by the dash number. The input
baud rate may vary by as much as ±15% from the nominal device baud rate without compromising the
integrity of the information received.
Because the 3D7502 is not PLL-based, it does not require a long preamble in order to lock onto the
received signal. Rather, the device requires at most one bit cell before the data presented at the output is
valid. This is extremely useful in cases where the information arrives in bursts and the input is otherwise
turned off.
The all-CMOS 3D7502 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL Manchester Decoders. It is TTL- and CMOS-compatible, capable of driving ten 74LS-type loads. It is
offered in standard 8-pin and 14-pin auto-insertable DIPs and space saving surface mount 8-pin and 14-
pin SOICs.
TABLE 1: PART NUMBER SPECIFICATIONS
PART
NUMBER
3D7502-5
3D7502-10
3D7502-20
3D7502-25
3D7502-30
3D7502-40
3D7502-50
BAUD RATE (MBaud)
Nominal Minimum Maximum
5.00
4.25
5.75
10.00
8.50
11.50
20.00
17.00
23.00
25.00
21.25
28.75
30.00
25.50
34.50
40.00
34.00
46.00
50.00
42.50
57.50
NOTES: Any baud rate between 5 and 50 MBaud not shown is also available at no extra cost. ©1997 Data Delay Devices
Doc #97032
DATA DELAY DEVICES, INC.
1
5/19/97
3 Mt. Prospect Ave. Clifton, NJ 07013

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]