ML2751DT Просмотр технического описания (PDF) - Micro Linear Corporation

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ML2751DT

Power Amplifier and LNA

Micro Linear Corporation 

PRELIMINARY

ML2751

FUNCTIONAL DESCRIPTION

TRANSMIT FUNCTIONALITY

Power Amplifier

The power amplifier (PA) consists of three cascaded gain

stages. The last stage (output stage) is powered directly

from the unregulated supply to increase end-product

battery life. The TPS and TPA pins are used to control its

output power. The TPS and TPA pins are connected to an

internal power control op amp as shown in Figure 1. The

op amp’s output voltage (VP) determines the PA's gain.

The voltage at VP drives a buffer that serves as a collector

supply for the first two stages of the power amplifier.

A ramp generator circuit between the power control op

amp and the buffer facilitates a gradual transition from

the on-state to the off-state of the PA on the rising/falling

edge of the PAON signal.

The DC voltage on the TPS pin determines VP, and may be

varied between 0V and 1V, with a nominal 100mW/V

sensitivity to this pin as shown in Figure 2. To compensate

for the IC manufacturing process variations of the power

amplifier the TPS voltage can be scaled by varying the

resistance between the TPA pin and ground. The value of

FEEN

PAON

Power

Control

Op Amp

BUFFER

TPS

+

VP

RAMP

VC

TPA

–

GENERATOR

100kΩ

RTPA GAIN SET

100kΩ

0Ω to

TRFI

open circuit

PA

TRFO

Figure 1. PA Power Setting and Ramp Generator

120

resistor RTPA effectively determines the gain of the op

amp. RTPA can range in value from 0W to open circuit.

For +20dBm output power the typical full-scale signal on

the TPS will lie between 0.5V and 1V with TPA grounded.

RECEIVE FUNCTIONALITY

Low Noise Amplifier (LNA)

The LNA is a two-stage transistor amplifier designed with

internal inter-stage impedance matching. The output is an

open collector that requires a load to a DC supply and

external matching. All associated bias circuits are

integrated internally. The LNA is controlled by the PAON

signal, as shown in Figure 3.

A nominal gain of 20dB and a noise figure of 2.5dB

complement the ML2721, optimizing the balance

between sensitivity and high signal performance. The

open-collector LNA output provides flexibility in

matching the impedance that an RF filter presents to the

LNA. The input can be matched for low noise using a

small value series capacitor, and the two-stage design

minimizes the interaction between the input and output

match. The RF filter is placed between the ML2751 and

the ML2721.

PIN Diode Driver

A pair of driver circuits is used to drive an external PIN

diode Transmit/Receive switch. The PIN diode drivers are

controlled from the timer’s internal enable signals. The

PIN and PINB output pins act as low impedance voltage

sources that switch between VCC and GND, with the

ability to both source and sink current.

The PIN and PINB outputs are under control of the FEEN

and PAON control input pins (see Figure 3). The switching

between the transmit and receive paths is synchronized

with the PA ramp function, so that the transmit path is

selected at the rising edge of the transmit ramp (when

PAON = 1) and held until the PA has ramped down (about

3µs after PAON = 0).

Simple PIN diode switches can be driven directly, without

100

the need for current limiting resistors, as each output has a

nominal 100W series impedance. This reduces the total

80

component count. For more complex (or lower power)

switches individual current limiting resistors may be used,

60

forcing the PIN and PINB pins to act as voltage sources.

The total current drawn from each output must not exceed

the current source/sink specification limits.

40

20

0

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0

VOLTAGE (V)

Figure 2. Output vs. TPS Curve

6

PRELIMINARY DATASHEET January, 2000

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