HMS91C7132 Просмотр технического описания (PDF) - Hynix Semiconductor
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HMS91C7132 Datasheet PDF : 90 Pages
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3. PIN ASSIGNMENT
3.1 40PDIP pinning
PWM0* /P2.2
1
DPWM0* /P2.1
2
40DIP
(Top View)
DPWM0* /P2.0
RESET
3
4
VDD1
5
VSS1
6
XTAL2
7
XTAL1
8
SDA2** /P1.7
9
SCL2** /P1.6
10
P0.7**
11
* : Open-drain option
P0.6**
12
** : Open-drain type pin
P0.5**
13
P0.4**
14
INT0/VPP
15
P0.3**
16
P0.2**
17
P0.1**
18
P0.0**
19
ACH3 /P1.5
20
HMS9xC7132 / HMS9xC7134
40
Vsync-IN
39
Hsync-IN
38
PWM1* /P2.3
37
PWM2* /P2.4
36
PWM3* /P2.5
35
PWM4* /P2.6
34
PWM5* /P2.7
33
Hsync-OUT /P3.2
32
Vsync-OUT /P3.3
31
PWM6* /INT1 /P3.4
30
CLAMP/PWM /P3.5
29
PADOUT /P3.6
28
SOG /P3.7
27
VDD2
26
VSS2
25
SCL1** /P1.0
24
SDA1** /P1.1
23
ACH0 /P1.2
22
ACH1 /P1.3
21
ACH2 /P1.4
PWM0* /P2.2
1
DPWM0* /P2.1
2
40DIP
(Top View)
DPWM0* /P2.0
RESET
3
4
VDD1
5
VSS1
6
XTAL2
7
XTAL1
8
SDA2** /P1.7
9
SCL2** /P1.6
10
* : Open-drain option
** : Open-drain type pin
P0.7**
11
P0.6**
12
P0.5**
13
P0.4**
14
INT0/VPP
15
P0.3**
16
P0.2**
17
P0.1**
18
P0.0**
19
ACH3 /P1.5
20
40
Vsync-IN
39
Hsync-IN
38
PWM1* /P2.3
37
PWM2* /P2.4
36
PWM3* /P2.5
35
PWM4* /P2.6
34
PWM5* /P2.7
33
Hsync-OUT /P3.2
32
Vsync-OUT /P3.3
31
PWM6* /INT1 /P3.4/CLAMP
30
PWM /P3.5
29
PADOUT /P3.6
28
SOG /P3.7
27
P3.0
26
P3.1
25
SCL1** /P1.0
24
SDA1** /P1.1
23
ACH0 /P1.2
22
ACH1 /P1.3
21
ACH2 /P1.4
May.2001 ver1.1
3
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