AD807(RevB) Просмотр технического описания (PDF) - Analog Devices

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производитель

AD807
(Rev.:RevB)

Fiber Optic Receiver with Quantizer and Clock Recovery and Data Retiming

Analog Devices 

AD807

USING THE AD807

Ground Planes

Use of one ground plane for connections to both analog and

digital grounds is recommended.

Power Supply Connections

Use of a 10 µF capacitor between VCC and ground is recom-

mended. Care should be taken to isolate the 5 V power trace to

VCC2 (Pin 3). The VCC2 pin is used inside the device to provide

the CLKOUT and DATAOUT signals.

Use of 0.1 µF capacitors between IC power supply and ground

is recommended. Power supply decoupling should take place as

close to the IC as possible. Refer to the schematic, Figure 12,

for recommended connections.

Transmission Lines

Use of 50 Ω transmission lines are recommended for PIN, NIN,

CLKOUT, and DATAOUT signals.

Terminations

Termination resistors should be used for PIN, NIN, CLKOUT,

and DATAOUT signals. Metal, thick film, 1% tolerance resistors

are recommended. Termination resistors for the PIN, NIN signals

should be placed as close as possible to the PIN, NIN pins.

Connections from 5 V to load resistors for PIN, NIN, CLKOUT,

and DATAOUT signals should be individual, not daisy chained.

This will avoid crosstalk on these signals.

Loop Damping Capacitor, CD

A ceramic capacitor may be used for the loop damping capaci-

tor. Using a 0.15 µF, +20% capacitor for a damping factor of

five provides < 0.1 dB jitter peaking.

AD807 Output Squelch Circuit

A simple P-channel FET circuit can be used in series with the

Output Signal ECL Supply (VCC2, Pin 3) to squelch clock and

data outputs when SDOUT indicates a loss of signal (Figure 20).

The VCC2 supply pin draws roughly 61 mA (14 mA for each of 4

ECL loads, plus 5 mA for all 4 ECL output stages). This means

that selection of a FET with ON RESISTANCE of 0.5 Ω will

affect the common mode of the ECL outputs by only 31 mV.

TO VCC1, AVCC, AVCC2

5V

P_FET

BYPASS

CAP

1 DATAOUTN

2 DATAOUTP

VEE 16

SDOUT 15

3 VCC2

4 CLKOUTN

AVCC2 14

PIN 13

5 CLKOUTP

NIN 12

6 VCC1

7 CF1

AVCC1 11

THRADJ 10

8 CF2

AVEE 9

AD807

Figure 20. Squelch Circuit Schematic

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

16-Lead Small Outline IC Package

(R-16A)

0.3937 (10.00)

0.3859 (9.80)

0.1574 (4.00) 16

0.1497 (3.80)

1

9 0.2440 (6.20)

0.2284 (5.80)

8

PIN 1 0.050 (1.27) 0.0688 (1.75)

BSC

0.0532 (1.35)

0.0196

0.0099

((00..5205))؋

45؇

0.0098 (0.25)

0.0040 (0.10)

8؇

0.0192 (0.49)

0.0138 (0.35)

SEATING

PLANE

0.0099 (0.25) 0؇

0.0075 (0.19)

0.0500 (1.27)

0.0160 (0.41)

–12–

REV. B

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