PIN DESCRIPTION
2.PIN DESCRIPTION
2.1. INTRODUCTION
The STPC Client integrates most of the functional-
ities of the PC architecture. As a result, many of
the traditional interconnections between the host
PC microprocessor and the peripheral devices are
totally assimilated to the STPC Client. This offers
improved performance due to the tight coupling of
the processor core and its peripherals. As a result
many of the external pin connections are made di-
rectly to the on-chip peripheral functions.
Figure 2-1 shows the STPC Client’s external inter-
faces. It defines the main busses and their func-
tion. Table 2-1 describes the physical implementa-
tion listing signals type and their functionality. Ta-
ble 2-2 provides a full pin listing and description of
the pins. Table 2-3 provides a full listing of pin lo-
cations of the STPC Client package by physical
connection. Please refer to the pin allocation
drawing for reference.
Table 2-1. Signal Description
Group name
Qty
Basic Clocks reset & Xtal (SYS)
14
Memory Interface (DRAM)
89
PCI interface (excluding VDD5)
54
ISA / IDE / IPC combined interface
83
Video Input (VIP)
9
TV Output (TV)
10
VGA Monitor interface (VGA)
10
Grounds
69
VDD
26
Analog specific VCC/VDD
14
Reserved/Test/ Misc./ Speaker
10
Total Pin Count
388
Note: Several interface pins are multiplexed with
other functions, refer to the Pin Description sec-
tion for further details
Figure 2-1. STPC Client External Interfaces
X86
STPC CLIENT
NORTH
PCI
DRAM VGA VIP TV
89
10
9
10
54
SOUTH
SYS ISA/IDE IPC
14
73
10
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