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INIC-1511 Просмотр технического описания (PDF) - Unspecified

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Компоненты Описание
производитель
INIC-1511
ETC
Unspecified 
INIC-1511 Datasheet PDF : 26 Pages
First Prev 21 22 23 24 25 26
Reserved
AtaIORDY0
Reserved
AtaINTRQ0
INIC-1511 (Preliminary)
r
4:3 2’b0 Reserved.
ru 2
1’bx Ata channel IORDY line.
r
1
1’b0 Reserved
ru 0
1’bx Ata channel INTRQ line.
6.2.17 ATA_Status_Low Register (0x0D6)
Field name
rscu bit reset Description
#
ATA_Status[7:0] rw 7-0 8’h0 CPU writes the ATA status to this register
6.2.18 ATA_Status_High Register (0x0D7)
Field name
rscu bit reset Description
#
ATA_Status[15:8] rw 7-0 8’h0 CPU writes the ATA status to this register
6.2.19 usb_INT_Enable Register (0x0D8)
Field name
rscu bit reset Description
#
Usb_busRst_INT_En rw 7 1’b0 1: Enable Usb_busRst to trigger sysINT.
Usb_bulkOnlyRst_INrw 6 1’b0 1: Enable Usb_bulkOnlyRst to trigger sysINT.
Usb_Ep0Req_INT_E rw 5 1’b0 1: Enable Usb_ Ep0Req to trigger sysINT.
Usb_CBW_INT_En rw 4 1’b0 1: Enable Usb_CBW to trigger sysINT.
Usb_wakeup_INT_E rw 3 1’b0 1: Enable Usb_wakeup to trigger sysINT.
Usb_suspendINT_En rw 2 1’b0 1: Enable Usb_suspend to trigger sysINT.
VBUS_P__INT_En rw 1 1’b0 1: Enable positive of VBUS to trigger sysINT.
VBUS_N__INT_En rw 0 1’b0 1: Enable negative of VBUS to trigger sysINT.
6.2.20 usb_INT_Status/Clear Register
Field name
rscu bit reset
#
Usb_busRst
rw 7 1’b0
Usb_bulkOnlyRst rw 6 1’b0
Usb_Ep0Req
rw 5 1’b0
Usb_CBW
rw 4 1’b0
Usb_wakeup
rw 3 1’b0
Usb_suspend
rw 2 1’b0
VBUS_P__INT rw 1 1’b0
VBUS_N__INT rw 0 1’b0
(0x0D9)
Description
Read: 1: indicates this interrupt event occurred
Write 1: will clear this status bit
Read: 1: indicates this interrupt event occurred
Write 1: will clear this status bit.
Read: 1: indicates this interrupt event occurred
Write 1: will clear this status bit
Read: 1: indicates this interrupt event occurred
Write 1: will clear this status bit
Read: 1: indicates this interrupt event occurred
Write 1: will clear this status bit
Read: 1: indicates this interrupt event occurred
Write 1: will clear this status bit
Read: 1: indicates this interrupt event occurred
Write 1: will clear this status bit
Read: 1: indicates this interrupt event occurred
Write 1: will clear this status bit
Initio Corporation Confidential
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