AGL600V5-QNG144 Просмотр технического описания (PDF) - Microsemi Corporation
Номер в каталоге
Компоненты Описание
производитель
AGL600V5-QNG144 Datasheet PDF : 250 Pages
| |||
IGLOO Low Power Flash FPGAs
Revision / Version
Changes
DC & Switching, cont’d. Table 2-49 · Minimum and Maximum DC Input and Output Levels for LVCMOS
3.3 V Wide Range is new.
Revision 9 (Jul 2008)
Product Brief v1.1
DC and Switching
Characteristics
Advance v0.3
As a result of the Libero IDE v8.4 release, Actel now offers a wide range of core
voltage support. The document was updated to change 1.2 V / 1.5 V to 1.2 V to
1.5 V.
Revision 8 (Jun 2008)
As a result of the Libero IDE v8.4 release, Actel now offers a wide range of core
voltage support. The document was updated to change 1.2 V / 1.5 V to 1.2 V to
1.5 V.
DC and Switching
Characteristics
Advance v0.2
Tables have been updated to reflect default values in the software. The default I/O
capacitance is 5 pF. Tables have been updated to include the LVCMOS 1.2 V I/O
set.
DDR Tables have two additional data points added to reflect both edges for Input
DDR setup and hold time.
The power data table has been updated to match SmartPower data rather then
simulation values.
AGL015 global clock delays have been added.
Table 2-1 • Absolute Maximum Ratings was updated to combine the VCCI and
VMV parameters in one row. The word "output" from the parameter description for
VCCI and VMV, and table note 3 was added.
Table 2-2 • Recommended Operating Conditions 1 was updated to add
references to tables notes 4, 6, 7, and 8. VMV was added to the VCCI parameter
row, and table note 9 was added.
In Table 2-3 • Flash Programming Limits – Retention, Storage, and Operating
Temperature1, the maximum operating junction temperature was changed from
110° to 100°.
VMV was removed from Table 2-4 • Overshoot and Undershoot Limits 1. The
table title was modified to remove "as measured on quiet I/Os." Table note 2 was
revised to remove "estimated SSO density over cycles." Table note 3 was revised
to remove "refers only to overshoot/undershoot limits for simultaneous switching
I/Os."
The "PLL Behavior at Brownout Condition" section is new.
Figure 2-2 • V2 Devices – I/O State as a Function of VCCI and VCC Voltage
Levels is new.
EQ 2 was updated. The temperature was changed to 100°C, and therefore the
end result changed.
The table notes for Table 2-9 • Quiescent Supply Current (IDD) Characteristics,
IGLOO Flash*Freeze Mode*, Table 2-10 • Quiescent Supply Current (IDD)
Characteristics, IGLOO Sleep Mode*, and Table 2-11 • Quiescent Supply Current
(IDD) Characteristics, IGLOO Shutdown Mode were updated to remove VMV and
include PDC6 and PDC7. VCCI and VJTAG were removed from the statement
about IDD in the table note for Table 2-11 • Quiescent Supply Current (IDD)
Characteristics, IGLOO Shutdown Mode.
Note 2 of Table 2-12 • Quiescent Supply Current (IDD), No IGLOO Flash*Freeze
Mode1 was updated to include VCCPLL. Note 4 was updated to include PDC6
and PDC7.
Page
2-39
N/A
N/A
N/A
2-1
2-2
2-2
2-3
2-4
2-5
2-6
2-7
2-9
Revision 23
5-7
Share Link: 