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UPD75402 Просмотр технического описания (PDF) - NEC => Renesas Technology

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производитель
UPD75402
NEC
NEC => Renesas Technology 
UPD75402 Datasheet PDF : 48 Pages
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µPD75402A(A)
5.3 CLOCK OUTPUT CIRCUIT
The clock output circuit, which outputs clock pulses from pin P22/PCL, is used for supplying clock pulses
for peripheral LSIs or for remote control output.
• Clock output (PCL): 1.05 MHz, 524 kHz, 65.5 kHz (when fXX is 4.19 MHz).
Fig. 5-2 shows the configuration of the clock output circuit.
Fig. 5-2 Configuration of the Clock Output Circuit
From the clock
generator
Φ
f XX/26
Selector
Output
buffer
P22/PCL
CLOM3 0 CLOM1 CLOM0 CLOM
PORT2.2
P22 output
latch
4
Internal bus
Bit 2 of PMGB
Port 2 input/
output mode
specification bit
Remark The clock output circuit is designed not to output high-frequency pulses when clock output is
switched between the enable and disable states.
16

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