Block diagram and pin description
VN5050AJ-E
Figure 2. Configuration diagram (top view)
N.C.
1
12
GND
2
11
INPUT
3
10
CURRENT SENSE
4
9
CS_DIS
5
8
N.C.
6
7
TAB = Vcc
N.C.
OUTPUT
OUTPUT
OUTPUT
OUTPUT
N.C.
Note:
The above pin configuration reflects the changes notified with PCN-APG-BOD/07/2886. The
new pinout is backaward compatible with existing PCB layouts where pins #1 and #6 are
connected to Vcc and/or pins #7 and 12 are connected to OUTPUT. For new PCB designs,
these pins should be left unconnected.
Table 3. Suggested connections for unused and N.C. pins
Connection / Pin
Current Sense
N.C. Output
Input
CS_DIS
Floating
To ground
N.R.
X
Through 1kΩ resistor
X
X
N.R.(1)
X
X
Through 10kΩ Through
resistor 10kΩ resistor
1. Not recommended.
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