DSP56852 Просмотр технического описания (PDF) - Freescale Semiconductor

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DSP56852

16-bit Digital Signal Controllers

Freescale Semiconductor 

4.5.2 High Speed External Clock Source (> 4MHz)

The recommended method of connecting an external clock is given in Figure 4-7. The external clock

source is connected to XTAL and the EXTAL pin is held at ground (recommended), VDDA, or VDDA/2.

The TOD_SEL bit in CGM must be set to 1.

56852

XTAL EXTAL

External GND,VDDA,

Clock

(up to 240MHz)

or VDDA/2

Figure 4-7 Connecting a High Speed External Clock Signal using XTAL

4.5.3 Low Speed External Clock Source (2-4MHz)

The recommended method of connecting an external clock is given in Figure 4-8. The external clock

source is connected to XTAL and the EXTAL pin is held at VDDA/2. The TOD_SEL bit in CGM may be

set to 0 or 1. 0 is recommended.

56852

XTAL EXTAL

External

Clock

(2-4MHz)

VDDA/2

Figure 4-8 Connecting a Low Speed External Clock Signal using XTAL

Table 4-5 External Clock Operation Timing Requirements4

Operating Conditions: VSS = VSSIO = VSSA = 0V, VDD = 1.62-1.98V, VDDIO = VDDA = 3.0–3.6V, TA = –40° to +120°C, CL £ 50pF, fop = 120MHz

Characteristic

Symbol

Min

Typ

Max

Unit

Frequency of operation (external clock driver)1

fosc

0

—

240

MHz

Clock Pulse Width4

tPW

6.25

—

—

ns

External clock input rise time2, 4

trise

—

—

TBD

ns

External clock input fall time3, 4

tfall

—

—

TBD

ns

1. See Figure 4-7 for details on using the recommended connection of an external clock driver.

2. External clock input rise time is measured from 10 to 90 percent.

3. External clock input fall time is measured from 90 to 10percent.

4. Parameters listed are guaranteed by design.

56852 Technical Data, Rev. 8

22

Freescale Semiconductor

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