74LVC1G17(2007) Просмотр технического описания (PDF) - NXP Semiconductors.
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74LVC1G17 Datasheet PDF : 16 Pages
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NXP Semiconductors
12. Waveforms
74LVC1G17
Single Schmitt trigger buffer
VI
A input
GND
VOH
Y output
VOL
VM
t PHL
VM
Measurement points are given in Table 10.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig 10. The input A to output Y propagation delay times
t PLH
mnb153
Table 10. Measurement points
Supply voltage
VCC
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
3.0 V to 3.6 V
4.5 V to 5.5 V
Input
VM
0.5 × VCC
0.5 × VCC
1.5 V
1.5 V
0.5 × VCC
Output
VM
0.5 × VCC
0.5 × VCC
1.5 V
1.5 V
0.5 × VCC
VI
G
VCC
VO
DUT
RT
VEXT
RL
CL
RL
mna616
Test data is given in Table 11.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to the output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times.
Fig 11. Load circuitry for switching times
74LVC1G17_6
Product data sheet
Rev. 06 — 27 August 2007
© NXP B.V. 2007. All rights reserved.
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