74LVQ174_99 Просмотр технического описания (PDF) - STMicroelectronics
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74LVQ174_99 Datasheet PDF : 10 Pages
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74LVQ174
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1
2, 5, 7, 10,
12, 15
3, 4, 6, 11,
13, 14
9
8
16
S YM BO L
CLEAR
Q0 to Q5
NAME AND FUNCTION
Asyncronous Master Reset
(Active LOW)
Flip-Flop Outputs
D0 to D5 Data Inputs
CLOCK
GND
VCC
Clock Input (LOW-to-HIGH,
Edge- Triggered)
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
CLEAR
L
H
H
H
X:Don’t Care
INPUTS
D
X
L
H
X
LOGIC DIAGRAM
CLOCK
X
OUTPUTS
Q
L
L
H
Qn
FUNCTION
CLEAR
NO CHANGE
Thislogic diagram has notbe used to estimate propagation delays
2/10
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