AD8192ACPZ Просмотр технического описания (PDF) - Analog Devices

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производитель

AD8192ACPZ

2:1 HDMI/DVI Switch with Equalization and DDC/CEC Buffers

Analog Devices 

AD8192

TA = 27°C, AVCC = 3.3 V, VTTI = 3.3 V, VTTO = 3.3 V, AVEE = 0 V, DVEE = 0 V, differential input swing = 1000 mV, pattern = PRBS 27 − 1,

data rate = 2.25 Gbps, TMDS outputs terminated with external 50 Ω resistors to 3.3 V, unless otherwise noted.

DIGITAL

PATTERN

GENERATOR

AD8192

EVALUATION

BOARD

HDMI CABLE

SERIAL DATA

ANALYZER

SMA COAX CABLE

REFERENCE EYE DIAGRAM AT TP1

TP1

TP2

TP3

Figure 9. Test Circuit Diagram for Tx Eye Diagrams

0.125UI/DIV AT 2.25Gbps

Figure 10. Tx Eye Diagram at TP2, PE = 0 dB

0.125UI/DIV AT 2.25Gbps

Figure 12. Tx Eye Diagram at TP3, PE = 0 dB (Cable = 2 m, 24 AWG)

0.125UI/DIV AT 2.25Gbps

Figure 11. Tx Eye Diagram at TP2, PE = 6 dB

0.125UI/DIV AT 2.25Gbps

Figure 13. Tx Eye Diagram at TP3, PE = 6 dB (Cable = 10 m, 24 AWG)

Rev. 0 | Page 9 of 28

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