AD8694WAC-P7 Просмотр технического описания (PDF) - Analog Devices

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Компоненты Описание

производитель

AD8694WAC-P7

Low Cost, Low Noise, CMOS, RRO Operational Amplifiers

Analog Devices 

AD8691/AD8692/AD8694

2.20

2.00

1.80

1.35

5

4

2.40

1.25

2.10

1.15

1

2

3

1.80

0.65 BSC

1.00

0.90

0.70

1.10

0.40

0.80

0.10

0.10 MAX

0.30

SEATING

0.22

PLANE

0.08

0.46

0.36

COPLANARITY

0.15

0.26

0.10

COMPLIANT TO JEDEC STANDARDS MO-203-AA

Figure 34. 5-Lead Thin Shrink Small Outline Package [SC70]

(KS-5)

Dimensions shown in millimeters

2.90 BSC

1.60 BSC

5

4

2.80 BSC

1

2

3

*0.90 MAX

0.70 MIN

1.90

BSC

0.95 BSC

*1.00 MAX 0.20

0.08

0.10 MAX

0.50

0.30

8°

SEATING

4°

0.60

PLANE

0°

0.45

0.30

*COMPLIANT TO JEDEC STANDARDS MO-193-AB WITH

THE EXCEPTION OF PACKAGE HEIGHT AND THICKNESS.

Figure 35. 5-Lead Thin Small Outline Transistor Package [TSOT]

(UJ-5)

Dimensions shown in millimeters

Data Sheet

Rev. F | Page 12 of 16

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