AD9777BSV Просмотр технического описания (PDF) - Analog Devices

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AD9777BSV

16-Bit, 160 MSPS 2x/4x/8x Interpolating Dual TxDAC+® D/A Converter

Analog Devices 

REVISION HISTORY

1/06—Rev. B to Rev. C

Updated Formatting .........................................................Universal

Changes to Figure 32 .................................................................... 22

Changes to Figure 108 .................................................................. 54

Updated Outline Dimensions ..................................................... 58

Changes to Ordering Guide......................................................... 58

6/04—Data Sheet Changed from Rev. A to Rev. B.

Changes to DC Specifications ....................................................... 5

Changes to Absolute Maximum Ratings...................................... 8

Changes to DAC Operation Section........................................... 25

Changes to Figure 49, Figure 50, and Figure 51........................ 29

Changes to the PLL Enabled, One-Port Mode Section............ 30

Changes to the PLL Disabled, One-Port Mode Section........... 32

Changes to the Ordering Guide .................................................. 57

Updated the Outline Dimensions ............................................... 57

3/03—Data Sheet Changed from Rev. 0 to Rev. A.

Edits to Features .............................................................................. 1

Edits to DC Specifications ............................................................. 3

Edits to Dynamic Specifications.................................................... 4

Edits to Pin Function Descriptions............................................... 7

Edits to Table I ............................................................................... 14

Edits to Register Description—Address 02h Section ............... 15

Edits to Register Description—Address 03h Section ............... 16

AD9777

Edits to Register Description—Address 07h, 0Bh Section...... 16

Edits to Equation 1........................................................................ 16

Edits to MSB/LSB Transfers Section........................................... 18

Changes to Figure 8 ...................................................................... 20

Edits to Programmable PLL Section........................................... 21

Added new Figure 14.................................................................... 22

Renumbered Figures 15 to 69...................................................... 22

Added Two-Port Data Input Mode Section............................... 23

Edits to PLL Enabled, Two-Port Mode Section ........................ 24

Edits to Figure 19 ......................................................................... 24

Edits to Figure 21 .......................................................................... 25

Edits to PLL Disabled, Two-Port Mode Section ....................... 25

Edits to Figure 22 .......................................................................... 25

Edits to Figure 23 .......................................................................... 26

Edits to Figure 26a ........................................................................ 27

Changes to Figures 53 and 54...................................................... 38

Edits to Evaluation Board Section .............................................. 39

Changes to Figures 56 to 59......................................................... 40

Replaced Figures 60 to 69 ............................................................ 42

Updated Outline Dimensions...................................................... 49

7/02—Revision 0: Initial Version

Rev. C | Page 3 of 60

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