ADUM1250SRZ Просмотр технического описания (PDF) - Analog Devices

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ADUM1250SRZ

Hot Swappable, Dual I2C Isolators

Analog Devices 

Data Sheet

ADuM1250/ADuM1251

TYPICAL APPLICATION DIAGRAM

Figure 9 shows a typical application circuit including the pull-up

resistors required for both Side 1 and Side 2 buses. Bypass capaci-

tors with values from 0.01 μF to 0.1 μF are required between VDD1

and GND1 and between VDD2 and GND2. The 200 Ω resistor shown

in Figure 9 is required for latch-up immunity if the ambient

temperature can be between 105°C and 125°C.

VDD1

SDA1

SCL1

OPTIONAL

200Ω

1 ADuM1250 8

2

7

3

6

VDD2

SDA2

SCL2

I2C BUS

GND1

4

5

GND2

Figure 9. Typical Isolated I2C Interface Using the ADuM1250

CAPACITIVE LOAD AT LOW SPEEDS

The ADuM1250/ADuM1251 are designed for operation at

speeds up to 1 Mbps. Due to the limited current available on

Side 1, operation at 1 Mbps limits the capacitance that can be

driven at the minimum pull-up value to 40 pF.

Most applications operate at 100 kbps in standard mode or

400 kbps in fast mode. At these lower operating speeds, the

limitation on the load capacitance can be significantly relaxed.

Table 11 shows the maximum capacitance at minimum pull-up

values for standard and fast operating modes. If larger values

for the pull up resistor are used, the maximum supported

capacitance must be scaled down proportionately so that the

rise time does not increase beyond the values required by the

standard.

Table 11. Side 1 Maximum Load Conditions

Maximum Capacitive Load for Side 1

Mode

VDD1

Data Rate (kbps)

tr (ns)

tf (ns)

Standard

5

100

1000

187

Fast

5

400

300

172

Standard

3.3

100

1000

270

Fast

3.3

400

300

235

R1 (Ω)

1600

1600

1000

1000

CL1 (pF)

484

120

771

188

Rev. I | Page 11 of 16

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