HYB39S256800T-8A Просмотр технического описания (PDF) - Infineon Technologies

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HYB39S256800T-8A

256 MBit Synchronous DRAM

Infineon Technologies 

11.1 Clock Suspension During Burst Read (Using CKE)

Burst Length = 4, CAS Latency = 2

T0 T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 T12 T13 T14 T15 T16 T17 T18 T19 T20 T21 T22

CLK

tCK2

CKE

CS

RAS

CAS

WE

BS

AP

RAx

Addr

RAx

CAx

DQM

Hi-Z

DQ

tCSL

tCSL

tCSL

Ax0

Ax1

Ax2

tHZ

Ax3

Activate

Command

Bank A

Read

Command

Bank A

Clock Suspend Clock Suspend

1 Cycle

2 Cycles

Clock Suspend

3 Cycles

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