BD8314NUV(2011) Просмотр технического описания (PDF) - ROHM Semiconductor

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BD8314NUV
(Rev.:2011)

High-efficiency Step-up Switching Regulator with Built-in Power MOSFET

ROHM Semiconductor 

BD8314NUV

Technical Note

●Selection of Part for Applications

(1) Inductor

A shielded inductor that satisfies the current rating

(current value, Ipecac as shown in the drawing below)

and has a low DCR (direct resistance component) is

recommended.

Inductor values affect inductor ripple current, which will

cause output ripple.

Ripple current can be reduced as the coil L value

becomes larger and the

switching frequency becomes higher.

Δ IL

Fig.33 Inductor current

  Ipeak  IOUT  VOUT / VIN /η ΔIL / 2 [A] ・・・(1)

ΔIL



VIN

L



VOUT  VIN

VOUT



1 [A]

f

・・・(2)

(η: Efficiency, ∆IL: Output ripple current, f: Switching frequency)

As a guide, inductor ripple current should be set at about 20 to 50% of the maximum input current.

* Current over the coil rating flowing in the coil brings the coil into magnetic saturation, which may lead to lower

efficiency or output oscillation. Select an inductor with an adequate margin so that the peak current does not

exceed the rated current of the coil.

(2) Output capacitor

A ceramic capacitor with low ESR is recommended for output in order to reduce output ripple.

There must be an adequate margin between the maximum rating and output voltage of the capacitor, taking the DC

bias property into consideration.

Output ripple voltage is obtained by the following equation.

VPP

 IOUT



f

VOUT  VIN

 CO  VOUT



IOUT



RESR

[V]

・・・(3)

Setting must be performed so that output ripple is within the allowable ripple voltage.

(3) Output voltage setting

The internal reference voltage of the ERROR AMP is 1.0 V. Output voltage is obtained by Equation (4) of Fig. 33,

but it should be designed taking about 50 Ω, an error of NMOS ON resistance of SWOUT into consideration.

VOUT

R1

ERROR AMP

INV

VO



R1 R2

R2



1.0

[V]

・・・(4)

R2

VREF

1.0V

SWOUT

STB

Fig.34 Setting of voltage feedback resistance

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10/15

2011.08 - Rev.D

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