AD8109ASTZ(2016) Просмотр технического описания (PDF) - Analog Devices
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AD8109ASTZ Datasheet PDF : 27 Pages
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AD8108/AD8109
Data Sheet
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
1, 3, 5, 7, 9, 11, 13, 15
INxx
57
DATA IN
58
CLK
59
DATA OUT
56
UPDATE
61
60
55
41, 38, 35, 32, 29, 26, 23, 20
2, 4, 6, 8, 10, 12, 14, 16, 46
63, 79
62, 80
17, 45
18, 44
42, 39, 36, 33, 30, 27, 24, 21
43, 37, 31, 25, 19
40, 34, 28, 22
54
53
52
51
50
49
48
47, 64 to 78
RESET
CE
SER/PAR
OUTyy
AGND
DVCC
DGND
AVEE
AVCC
AGNDxx
AVCCxx/yy
AVEExx/yy
A0
A1
A2
D0
D1
D2
D3
NC
Description
Analog Inputs. xx = Channels 00 through 07.
Serial Data Input, TTL Compatible.
Clock, TTL Compatible. Falling edge triggered.
Serial Data Output, TTL Compatible.
Enable (Transparent) Low. Allows serial register to connect directly to switch matrix. Data
latched when high.
Disable Outputs, Active Low.
Chip Enable, Enable Low. Must be low to clock in and latch data.
Selects Serial Data Mode, Low or Parallel, High. Must be connected.
Analog Outputs. yy = Channels 00 through 07.
Analog Ground for Inputs and Switch Matrix.
5 V for Digital Circuitry
Ground for Digital Circuitry
−5 V for Inputs and Switch Matrix.
+5 V for Inputs and Switch Matrix.
Ground for Output Amp. xx = Output Channels 00 through 07. Must be connected.
+5 V for Output Amplifier that is Shared by Channels xx and yy. Must be connected.
−5 V for Output Amplifier that is Shared by Channels xx and yy. Must be connected.
Parallel Data Input, TTL Compatible (output select LSB).
Parallel Data Input, TTL Compatible (output select).
Parallel Data Input, TTL Compatible (output select MSB).
Parallel Data Input, TTL Compatible (input select LSB).
Parallel Data Input, TTL Compatible (input select).
Parallel Data Input, TTL Compatible (input select MSB).
Parallel Data Input, TTL Compatible (output enable).
No Connect.
Rev. C | Page 10 of 27
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