CY7C68000
DIMENSIONS IN MM[INCHES] MIN.
REFERENCE JEDEC MO-220
56-Lead QFN 8 x 8 mm (Sawn Version) LS56B
MAX.
TOP VIEW
SIDE VIEW
BOTTOM VIEW
A
PIN #1
CORNER
7.90[0.311]
8.10[0.319]
1.00[0.039] MAX.
0.08[0.003] C
0.20[0.008] REF.
0.04[0.0015] MAX.
0.18[0.007]
0.28[0.011]
PIN #1
CORNER
0.30[0.012]
0.50[0.020]
E-PAD
(PAD SIZE VARY
BY DEVICE TYPE)
E-PAD maximum size
4.75 X 5.46 mm [187 x 215 mils] (width x length).
C
SEATING
PLANE
6.45[0.254]
6.55[0.258]
0.50[0.020]
12.0
Figure 11-2. 56-lead Quad Flatpack No Lead Package (8 x 8 mm) (SAWN VERSION)
PCB Layout Recommendations[3]
51-85187-*A
The following recommendations should be followed to ensure
reliable high-performance operation.
• At least a four-layer impedance controlled boards are
required to maintain signal quality.
• Specify impedance targets (ask your board vendor what
they can achieve).
• To control impedance, maintain trace widths and trace
spacing to within specifications.
• Minimize stubs to minimize reflected signals.
• Connections between the USB connector shell and signal
ground must be done near the USB connector.
• Bypass/flyback capacitors on VBus, near the connector, are
recommended.
• DPLUS and DMINUS trace lengths should be kept to within
2 mm of each other in length, with preferred length of 20–30
mm.
• Maintain a solid ground plane under the DPLUS and
DMINUS traces. Do not allow the plane to be split under
these traces.
• If possible, do not place any vias on the DPLUS or DMINUS
trace routing.
• Isolate the DPLUS and DMINUS traces from all other signal
traces by no less than 10 mm.
Note:
3. Source for recommendations: EZ-USB FX2™ PCB Design Recommendations, http:///www.cypress.com/cfuploads/support/app_notes/FX2_PCB.pdf High-
Speed USB Platform Design Guidelines, http://www.usb.org/developers/docs/hs_usb_pdg_r1_0.pdf.
Document #: 38-08016 Rev. *H
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