DG509AMY/PR Просмотр технического описания (PDF) - Maxim Integrated
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производитель
DG509AMY/PR Datasheet PDF : 9 Pages
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Monolithic CMOS Analog Multiplexers
Pin Configurations
TOP VIEW
A0 1
EN 2
V- 3
S1 4
S2 5
S3 6
S4 7
D8
DG508A
16 A1
15 A2
14 GND
13 V+
12 S5
11 S6
10 S7
9 S8
A0 1
EN 2
V- 3
S1A 4
S2A 5
S3A 6
S4A 7
DA 8
DG509A
DIP/SO
16 A1
15 GND
14 V+
13 S1B
12 S2B
11 S3B
10 S4B
9 DB
V+
V-
GND
S1
S2
S3
S4
D
S5
S6
S7
S8
DG508A CMOS
DECODE LOGIC
Pin Descriptions
PIN
DG508A DG509A
DIP/SO DIP/SO
1, 15, 16 —
—
1, 16
2
2
3
3
4–7
—
—
4–7
8
—
—
8, 9
9–12
—
—
10–13
13
14
14
15
NAME
A0, A2,
A1
A0, A1
EN
V-
S1–S4
S1A–S4A
D
DA, DB
S8–S5
S4B–S1B
V+
GND
FUNCTION
Address Input
Address Input
Enable
Negative-Supply Voltage
Input
Analog Inputs,
Bidirectional
Analog Inputs,
Bidirectional
Analog Outputs,
Bidirectional
Analog Outputs,
Bidirectional
Analog Inputs,
Bidirectional
Analog Inputs,
Bidirectional
Positive-Supply Voltage
Input
Ground
Functional Diagrams
V+
V-
GND
S1A
S2A
DA
S3A
S4A
S1B
S2B
DB
S3B
S4B
DG509A CMOS
DECODE LOGIC
A2
A1
A0
EN
DG508A
8-CHANNEL SINGLE ENDED MULTIPLEXER
A1
A0
EN
DG509A
DIFFERENTIAL 4-CHANNEL MULTIPLEXER
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