DS21Q59LN Просмотр технического описания (PDF) - Maxim Integrated

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DS21Q59LN

E1 Quad Transceiver

Maxim Integrated 

DS21Q59 Quad E1 Transceiver

Table 4-B. Pin Assignments (Sorted by Number)

NAME

PIN

PARALLEL

SERIAL PORT TYPE

PORT ENABLED

ENABLED

FUNCTION

[Serial Port Mode in Brackets]

1

TTIP4

2

TVSS4

3

TVDD4

4

TRING4

5

TCLK4

6

TSER4

7

TSYNC4

8

DVSS4

9

DVDD4

10

OUTB3

11

OUTA3

12

SYSCLK3

13

RSER3

14

RSYNC3

15

RVSS4

16

RTIP3

17

RRING3

18

RVDD4

19

D0/AD0

20

D1/AD1

21

D2/AD2

22

D3/AD3

23

D4/AD4

24

D5/AD5

25

D6/AD6

26

TTIP3

27

TVSS3

28

TVDD3

29

TRING3

30

TCLK3

31

TSER3

32

TSYNC3

33

DVSS3

34

DVDD3

35

OUTB2

36

OUTA2

37

SYSCLK2

38

RSER2

39

RSYNC2

40

RVSS3

41

RTIP2

42

RRING2

43

RVDD3

44

D7/AD7

45

A0

46

A1

47

A2

48

A3

49

A4

50

ALE (AS)/A5

51

TTIP2

52

TVSS2

53

TVDD2

54

TRING2

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

—

SDO

ICES

OCES

—

—

—

—

—

—

—

—

O

Transmit Analog Tip Output

—

Transmit Analog Signal Ground

—

Transmit Analog Positive Supply

O

Transmit Analog Ring Output

I

Transmit Clock

I

Transmit Serial Data

I/O

Transmit Sync

—

Digital Signal Ground

—

Digital Positive Supply

O

User-Selectable Output B

O

User-Selectable Output A

I

Transmit/Receive System Clock

O

Receive Serial Data

I/O

Receive Sync

—

Receive Analog Signal Ground

I

Receive Analog Tip Input

I

Receive Analog Ring Input

—

Receive Analog Positive Supply

I/O

Data Bus Bit 0/Address/Data Bus Bit 0

I/O

Data Bus Bit 1/Address/Data Bus Bit 1

I/O

Data Bus Bit 2/Address/Data Bus Bit 2

I/O

Data Bus Bit 3/Address/Data Bus Bit 3

I/O

Data Bus Bit 4/Address/Data Bus Bit 4

I/O

Data Bus Bit 5/Address/Data Bus Bit 5

I/O

Data Bus Bit 6/Address/Data Bus Bit 6

O

Transmit Analog Tip Output

—

Transmit Analog Signal Ground

—

Transmit Analog Positive Supply

O

Transmit Analog Ring Output

I

Transmit Clock

I

Transmit Serial Data

I/O

Transmit Sync

—

Digital Signal Ground

—

Digital Positive Supply

O

User-Selectable Output B

O

User-Selectable Output A

I

Transmit/Receive System Clock

O

Receive Serial Data

I/O

Receive Sync

—

Receive Analog Signal Ground

I

Receive Analog Tip Input

I

Receive Analog Ring Input

—

Receive Analog Positive Supply

I/O

Data Bus Bit 7/Address/Data Bus Bit 7 [Serial Data Output]

I

Address Bus Bit 0/Serial Port [Input-Clock Edge Select]

I

Address Bus Bit 1/Serial Port [Output-Clock Edge Select]

I

Address Bus Bit 2

I

Address Bus Bit 3

I

Address Bus Bit 4

I

Address Latch Enable/Address Bus Bit 5

O

Transmit Analog Tip Output

—

Transmit Analog Signal Ground

—

Transmit Analog Positive Supply

O

Transmit Analog Ring Output

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