DS28E02P-T Просмотр технического описания (PDF) - Maxim Integrated

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DS28E02P-T

1-Wire SHA-1 Authenticated 1Kb EEPROM with 1.8V Operation

Maxim Integrated 

ABRIDGED DATA SHEET

1-Wire SHA-1 Authenticated 1Kb

EEPROM with 1.8V Operation

Refer to the full data sheet.

Figure 6. Memory Protection Matrix

BIT # 7

6

5

4

3

2

1

0

T2

T1

T0

TARGET ADDRESS (TA1) T7

T6

T5

T4

T3

(0)

(0)

(0)

TARGET ADDRESS (TA2) T15

T14

T13

T12

T11

T10

T9

T8

ENDING ADDRESS WITH

DATA STATUS (E/S) AA

1

PF

1

(READ ONLY)

1

E2

E1

E0

(1)

(1)

(1)

Figure 7. Address Registers

Address Registers and Transfer Status

The DS28E02 employs three address registers: TA1,

TA2, and E/S (Figure 7). These registers are common to

many other 1-Wire devices, but operate slightly differ-

ently with the DS28E02. Registers TA1 and TA2 must be

loaded with the target address to which the data is writ-

ten or from which data is read. Register E/S is a read-

only transfer-status register used to verify data integrity

with write commands. Since the scratchpad of the

DS28E02 is designed to accept data in blocks of 8

bytes only, the lower 3 bits of TA1 are forced to 0 and

8 _______________________________________________________________________________________

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