EL4342ILZA-EVAL Просмотр технического описания (PDF) - Intersil
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EL4342ILZA-EVAL Datasheet PDF : 13 Pages
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EL4340, EL4342
Pin Descriptions
EL4342
EL4340
(32 LD QFN) (24 LD QSOP)
1
8
2, 4, 8, 13, 15, 4, 7, 9, 13, 15,
24, 28, 30
24
3
10
5
12
6
5
7
NA
9
NA
10
NA
11
11
12
NA
14
NA
16
NA
17
NA
18
14
19
17
20
18
21
16
22
20
23
19
25
22
-
23
26
21
27
6
29
3
31
1
32
2
PIN
NAME
IN1A
NIC
IN1B
IN1C
GNDB
IN2A
IN2B
IN2C
GNDC
IN3A
IN3B
IN3C
S1
S0
OUTC
OUTB
V-
OUTA
V+
ENABLE
LE
HIZ
IN0C
IN0B
IN0A
GNDA
EQUIVALENT
CIRCUIT
DESCRIPTION
Circuit 1 Channel 1 input for output amplifier "A"
Not Internally Connected; it is recommended these pins be tied to ground to
minimize crosstalk.
Circuit 1 Channel 1 input for output amplifier "B"
Circuit 1 Channel 1 input for output amplifier "C"
Circuit 4 Ground pin for output amplifier “B”
Circuit 1 Channel 2 input for output amplifier "A"
Circuit 1 Channel 2 input for output amplifier "B"
Circuit 1 Channel 2 input for output amplifier "C"
Circuit 4 Ground pin for output amplifier “C”
Circuit 1 Channel 3 input for output amplifier "A"
Circuit 1 Channel 3 input for output amplifier "B"
Circuit 1 Channel 3 input for output amplifier "C"
Circuit 2 Channel selection pin MSB (binary logic code)
Circuit 2 Channel selection pin. LSB (binary logic code)
Circuit 3 Output of amplifier “C”
Circuit 3 Output of amplifier “B”
Circuit 4 NegativPine power supply
Circuit 3 Output of amplifier “A”
Circuit 4 Positive power supply
Circuit 2
Device enable (active low). Internal pull-down resistor ensures the device will be
active with no connection to this pin. A logic High on this pin puts device into power-
down mode. In power-down mode only logic circuitry is active. All logic states are
preserved post power-down. This state is not recommended for logic control where
more than one MUX-amp share the same video output line.
Circuit 2
Device latch enable on the EL4340. A logic high on LE will latch the last (S0, S1)
logic state. HIZ and ENABLE functions are not latched with the LE pin.
Circuit 2
Output disable (active high). Internal pull-down resistor ensures the device will be
active with no connection to this pin. A logic high, puts the outputs in a high
impedance state. Use this state to control logic when more than one MUX-amp
share the same video output line.
Circuit 1 Channel 0 for output amplifier "C"
Circuit 1 Channel 0 for output amplifier "B"
Circuit 1 Channel 0 for output amplifier "A"
Circuit 4 Ground pin for output amplifier “A”
V+
IN
V-
CIRCUIT 1
LOGIC
21k +
1.2V
-
33k
CIRCUIT 2
V+
GND
V-
V+
OUT
V-
CIRCUIT 3
V+
GNDA
GNDB
GNDC
V-
CAPACITIVELY
COUPLED
ESD CLAMP
THERMAL HEAT SINK PAD
V-
~1MΩ
SUBSTRATE
CIRCUIT 4
8
FN7421.3
October 18, 2010
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