FM93C46A Просмотр технического описания (PDF) - Fairchild Semiconductor
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Компоненты Описание
производитель
FM93C46A Datasheet PDF : 13 Pages
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Timing Diagrams
SYNCHRONOUS DATA TIMING
CS
tCSS
tSKH
tSKL
SK
tDIS tDIH
Valid
DI
Input
tPD
DO (Data Read)
tSV
DO (Status Read)
Valid
Input
tDH
tPD
Valid
Output
Valid
Output
Valid Status
tCSH
tDF
tDF
READ CYCLE (READ)
tCS
CS
SK
DI
1 1 0 An An-1 A1 A0 ;;;;;;;;;;;;;;
Start Opcode
Bit Bits(2)
Address
Bits(6/7)
;;;;;;;;;;;;;;
DO
High - Z
0 Dn
;;; D1 D0
Dummy
Bit
93C46A (ORG=1; An=A5; Dn=D15):
Address bits pattern -> A5-A4-A3-A2-A1-A0; User defined
;;;
93C46A (ORG=0; An=A6; Dn=D7):
Address bits pattern -> A6-A5-A4-A3-A2-A1-A0; User defined
WRITE ENABLE CYCLE (WEN)
tCS
CS
SK
DI
1 0 0 An An-1
A1 A0
Start Opcode
Address
Bit Bits(2)
Bits(6/7)
High - Z
DO
93C46A (ORG=1; An=A5):
Address bits pattern -> 1-1-x-x-x-x; (x -> Don’t Care, can be 0 or 1)
93C46A (ORG=0; An=A6):
Address bits pattern -> 1-1-x-x-x-x-x; (x -> Don’t Care, can be 0 or 1)
FM93C46A Rev. C.1
8
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