H5PS1G63JFRE3L Просмотр технического описания (PDF) - Hynix Semiconductor
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H5PS1G63JFRE3L Datasheet PDF : 62 Pages
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Release
H5PS1G63JFR Series
4. Electrical Characteristics & AC Timing Specification
(TOPER; VDDQ = 1.8 +/- 0.1V; VDD = 1.8 +/- 0.1V)
Refresh Parameters by Device Density
Parameter
Refresh to Active/Refresh
command time
Symbol
tRFC
256Mb 512Mb 1Gb 2Gb 4Gb Units Notes
75
105 127.5 195 327.5 ns
1
Average periodic
refresh interval
-40 ℃≤ TCASE ≤ 85
℃
7.8
tREFI
85℃＜ TCASE ≤ 95
℃
3.9
7.8 7.8 7.8 7.8 us
1
3.9 3.9 3.9 3.9 us 1,2
Note:
1: If refresh timing is violated, data corruption may occur and the data must be re-written with valid data before a valid READ can be
executed.
2. This is an optional feature. For detailed information, please refer to “operating temperature condition” in this data sheet.
DDR2 SDRAM speed bins and tRCD, tRP and tRC for corresponding bin
Speed
DDR2-800
DDR2-667
DDR2-533 DDR2-400 Units Notes
Parameter
min
min
min
min
min
min
Bin(CL-tRCD-tRP)
5-5-5
6-6-6
4-4-4
5-5-5
4-4-4
3-3-3
CAS Latency
5
6
4
5
4
3
tCK
tRCD
tRP*1
12.5
15
12
15
15
15
ns
2
12.5
15
12
15
15
15
ns
2
tRAS
45
45
45
45
45
40
ns 2,3
tRC
57.5
60
57
60
60
55
ns
2
Note:
1. 8 bank device Precharge All Allowance: tRP for a Precharge All command for an 8 Bank device will equal to tRP+1*tCK, where tRP
are the values for a single bank Precharge, which are shown in the table above.
2. Refer to Specific Notes 32.
3. Refer to Specific Notes 3.
Rev. 1.7 / Nov. 2011
20
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