IR3081
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over: 9.5V ≤ VCC ≤ 14V, 0 oC ≤ TJ ≤ 100 oC
PARAMETER
TEST CONDITION
MIN
VDAC Reference
System Set-Point Accuracy
-0.3V ≤ VOSNS- ≤ 0.3V, Connect FB to
EAOUT, Measure V(EAOUT) –
V(VOSNS-) deviation from Table 1.
Applies to all VID codes.
Source Current
RROSC = 41.9kΩ
68
Sink Current
RROSC = 41.9kΩ
47
VID Input Threshold
500
VID Input Bias Current
0V ≤ VID0-5 ≤ VCC
-5
Regulation Detect Comparator
-5
Input Offset
Regulation Detect to EAOUT
Delay
BBFB to FB Bias Current
0.95
Ratio
VID 11111x Blanking Delay
Measure Time till PWRGD drives low
VID Step Down Detect
Blanking Time
Measure from VID inputs to EAOUT
VID Down BB Clamp Voltage Percent of VDAC voltage
70
VID Down BB Clamp Current
3.5
Error Amplifier
Input Offset Voltage
Connect FB to EAOUT, Measure
-3
V(EAOUT) – V(DAC). from Table 1.
Applies to all VID codes and -0.3V ≤
VOSNS- ≤ 0.3V. Note 2
FB Bias Current
RROSC = 41.9kΩ
28
DC Gain
Note 1
90
Gain-Bandwidth Product
Note 1
4
Source Current
0.4
Sink Current
0.7
Max Voltage
VBIAS–VEAOUT (referenced to VBIAS) 125
Min Voltage
Normal operation or Fault mode
30
VDRP Buffer Amplifier
Input Offset Voltage
V(VDRP) – V(IIN), 0.8V ≤ V(IIN) ≤ 5.5V
-8
Input Voltage Range
0.8
Bandwidth (-3dB)
Note 1
1
Input Voltage Range
0.8
Slew Rate
IIN Bias Current
0
TYP
0.5
80
55
600
0
0
130
1.00
800
1.7
75
6.2
4
29.5
100
7
0.6
1.2
250
100
0
6
10
0.75
MAX UNIT
%
92
µA
63
µA
700 mV
5
µA
5
mV
200
ns
1.05 µA/µA
ns
µs
80
%
12
mA
8
mV
31
µA
105 dB
MHz
0.8
mA
1.7
mA
375 mV
150 mV
8
mV
5.5
V
MHz
5.5
V
V/µs
1.5
µA
Page 3 of 20
9/1/03