ISL6146 Просмотр технического описания (PDF) - Intersil

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Компоненты Описание

производитель

ISL6146

Low Voltage OR-ing FET Controller

Intersil 

ISL6146

Package Outline Drawing

M8.118

8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE

Rev 4, 7/11

5

3.0±0.05

A

D

8

1.10 MAX

4.9±0.15

3.0±0.05

5

PIN# 1 ID

12

B

0.65 BSC

TOP VIEW

H

0.25 - 0.36

0.08 M C A-B D

SIDE VIEW 1

0.85±010

C

SEATING PLANE

0.10 ± 0.05

0.10 C

DETAIL "X"

SIDE VIEW 2

0.09 - 0.20

0.95 REF

GAUGE

PLANE

0.25

0.55 ± 0.15

DETAIL "X"

3°±3°

(5.80)

(4.40)

(3.00)

(0.65)

(1.40)

(0.40)

TYPICAL RECOMMENDED LAND PATTERN

NOTES:

1. Dimensions are in millimeters.

2. Dimensioning and tolerancing conform to JEDEC MO-187-AA

and AMSEY14.5m-1994.

3. Plastic or metal protrusions of 0.15mm max per side are not

included.

4. Plastic interlead protrusions of 0.15mm max per side are not

included.

5. Dimensions are measured at Datum Plane "H".

6. Dimensions in ( ) are for reference only.

28

FN7667.4

April 26, 2013

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