Timing diagrams
Figure 1a: Switching a resistive load,
change of load current in on-condition:
IN
ST
t don(ST)
VOUT
ton
IL
tslc(IS)
t doff(ST)
t off
t slc(IS)
PROFET® ITS 640S2
Figure 2a: Switching a lamp
IN
ST
V
OUT
IL
Load 1
Load 2
IIS
tson(IS)
I IS
t
t
t soff(IS)
The sense signal is not valid during settling time after turn or
change of load current.
Figure 1b: Vbb turn on:
IN
Vbb
Figure 2b: Switching a lamp with current limit:
IN
ST
IL
IIS
ST
proper turn on under all conditions
Infineon Technologies AG
VOUT
IL
IIS
t
Page 10
t
2006-Mar-28