Philips Semiconductors
Downconverter for DVB
Product specification
TDA9829T
FEATURES
• 5 V supply voltage
• Gain controlled IF-amplifier
• Mixer for DVB-IF downconversion
• VCO for Quadrature Amplitude Modulation (QAM)
carrier recovery
• External VCO control
• Internal and external AGC
• DVB output level adjust via AGC adjust
• High level DVB operational output amplifier
• Mute switch for DVB output
• Tuner AGC with adjustable takeover point (TOP)
• AFC detector without extra reference circuit
• Stabilizer circuit for ripple rejection and to achieve
constant output signals.
GENERAL DESCRIPTION
The TDA9829T is an integrated circuit for DVB-IF
processing.
QUICK REFERENCE DATA
SYMBOL
VP
IP
V3-4(rms)
∆ϕSSB
αmute
I12(sink)
CRstps(US)
V11(p-p)
B−1dB
αH
PSRR
PARAMETER
CONDITIONS
supply voltage
note 1
supply current
input sensitivity (RMS value)
−1 dB DVB signal at output
VCO phase noise
f = 100 kHz; free-running
mute attenuation
note 2
sink current
maximum tuner gain
reduction; see Fig.3
control steepness ∆I14/∆fIF for
USA
fIF = 43.75 MHz;
notes 3 and 4; see Fig.4
output voltage
(peak-to-peak value)
CL < 15 pF; RL > 5 kΩ; with
internal AGC
−1 dB bandwidth
CL < 15 pF; RL > 5 kΩ
suppression of in-band harmonics Vo = 2.0 V (p-p)
power supply ripple rejection at see Fig.5
pin 11
MIN.
4.5
81
−
103
−
1.5
0.7
1.8
11
30
26
TYP.
5.0
96
100
107
36
2
0.98
2.1
12
35
36
MAX.
5.5
111
150
−
−
2.6
1.3
2.4
−
−
−
UNIT
V
mA
µV
dBc/Hz
dB
mA
µA/kHz
V
MHz
dB
dB
Notes
1. Performance may be decreased at VP = 4.5 V.
2. This parameter is not tested during production and is only given as application information for designing the television
receiver.
3. To match the AFC output signal to different tuning systems a current source output is provided. The test circuit is
given in Fig.4. The AFC-steepness can be changed by the resistors at pin 14.
4. Depending on the ratio ∆C/C0 of the LC resonant circuit of VCO (Q0 > 50; C0 = Cint + Cext; see Table 2).
1998 Nov 09
2