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LT3959EUHE

Wide Input Voltage Range Boost/SEPIC/Inverting Converter with 6A, 40V Switch

Linear Technology 

LT3959

Applications Information

Duty Cycle Consideration

Switching duty cycle is a key variable defining converter

operation. As such, its limits must be considered. Minimum

on-time is the smallest time duration that the LT3959 is

capable of turning on the internal power MOSFET. This time

is generally about 150ns (typical) (see Minimum On-Time

in the Electrical Characteristics table). In each switching

cycle, the LT3959 keeps the power switch off for at least

150ns (typical) (see Minimum Off-Time in the Electrical

Characteristics table).

The minimum on-time and minimum off-time and the

switching frequency define the minimum and maximum

switching duty cycles a converter is able to generate:

Minimum duty cycle = minimum on-time • frequency

Maximum duty cycle = 1 – (minimum off-time • frequency)

Programming the Output Voltage

The output voltage (VOUT) is set by a resistor divider, as

shown in Figure 1. The positive VOUT and negative VOUT

are set by the following equations:

VOUT(POSITIVE)

=

1.6V

•

1+

R2 

R1

VOUT(NEGATIVE)

=

–0.8V

•

1+

R2 

R1

The resistors R1 and R2 are typically chosen so that the

error caused by the current flowing into the FBX pin dur-

ing normal operation is less than 1% (this translates to a

maximum value of R1 at about 121k).

Soft-Start

The LT3959 contains several features to limit peak switch

currents and output voltage (VOUT) overshoot during

start-up or recovery from a fault condition. The primary

purpose of these features is to prevent damage to external

components or the load.

High peak switch currents during start-up may occur in

switching regulators. Since VOUT is far from its final value,

the feedback loop is saturated and the regulator tries to

charge the output capacitor as quickly as possible, resulting

in large peak currents. A large surge current may cause

inductor saturation or power switch failure.

LT3959 addresses this mechanism with the SS pin. As

shown in Figure 1, the SS pin reduces the internal power

MOSFET current by pulling down the VC pin through Q2.

In this way the SS allows the output capacitor to charge

gradually toward its final value while limiting the start-up

peak currents.

Besides start-up, soft-start can also be triggered by

INTVCC undervoltage lockout and/or thermal lockout, which

causes the LT3959 to stop switching immediately. The SS

pin will be discharged by Q3. When all faults are cleared

and the SS pin has been discharged below 0.2V, a 10µA

current source IS2 starts charging the SS pin, initiating a

soft-start operation.

The soft-start interval is set by the soft-start capacitor

selection according to the equation:

TSS

=

CSS

•

1.25V

10µA

FBX Frequency Foldback

When VOUT is very low during start-up or a short-circuit

fault on the output, the switching regulator must operate

at low duty cycles to maintain the power switch current

within the current limit range, since the inductor current

decay rate is very low during switch off time. The minimum

on-time limitation may prevent the switcher from attaining

a sufficiently low duty cycle at the programmed switching

frequency. So, the switch current will keep increasing

through each switch cycle, exceeding the programmed

current limit. To prevent the switch peak currents from

exceeding the programmed value, the LT3959 contains

a frequency foldback function to reduce the switching

frequency when the FBX voltage is low (see the Normal-

ized Switching Frequency vs FBX graph in the Typical

Performance Characteristics section).

For more information www.linear.com/LT3959

3959fa

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