DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

LT6703I-2(RevA) Просмотр технического описания (PDF) - Linear Technology

Номер в каталоге
Компоненты Описание
производитель
LT6703I-2
(Rev.:RevA)
Linear
Linear Technology 
LT6703I-2 Datasheet PDF : 12 Pages
First Prev 11 12
LT6703-2/LT6703-3
PACKAGE DESCRIPTION
DC Package
3-Lead Plastic DFN (2mm × 2mm)
(Reference LTC DWG # 05-08-1717 Rev Ø)
1.35 ±0.05
(2 SIDES)
1.00 ±0.05
1.30 ±0.05 (2 SIDES)
2.00 ±0.05
PACKAGE
OUTLINE
0.25 ± 0.05
0.50 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
0.200 REF
2.00 ±0.10
(4 SIDES)
0.75 ±0.05
1.35 ± 0.05
(2 SIDES)
R = 0.05
TYP
1.00 ± 0.05
(2 SIDES)
PIN 1 NOTCH
R = 0.20 OR
0.25 × 45°
CHAMFER
0.40 ±0.05
0.70 ±0.05
3
1
R = 0.115 TYP
0.25 ± 0.05
0.50 BSC
BOTTOM VIEW—EXPOSED PAD
(DC3) DFN 1205 REV Ø
NOTE:
0.00 – 0.05
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (W-TBD)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
670323fa
11

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]