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LTC6102IDD

Precision Zero Drift Current Sense Amplifier

Linear Technology 

LTC6102

LTC6102-1/LTC6102HV

Applications Information

V+

RIN–

RSENSE

RIN+ +IN

LOAD

RBIAS

V–

2.7M

EN

+–

–INS

–INF

V+

VREG

0.1µF

LTC6102-1

RIN+ = RIN– – RSENSE

OUT

VOUT

ROUT

6102 F11

Figure 11

pin. Figure 11 shows the LTC6102-1 with a 2.7M pull-up

resistor to limit the current to less than 20µA with a 60V

supply, which is enough to satisfy the input bias current

requirement.

Start-Up Current

The start-up current of the LTC6102 when the part is

powered on or enabled (LTC6102-1) consists of three

parts: the first is the current necessary to charge the

VREG bypass capacitor, which is nominally 0.1µF. Since the

VREG voltage charges to approximately 4.5V below the V+

voltage, this can require a significant amount of start-up

current. The second source is the active supply current of

the LTC6102 amplifier, which is not significantly greater

during start-up than during normal operation. The third

source is the output current of the LTC6102, which upon

start-up may temporarily drive the output high. This could

cause milliamps of output current (limited mostly by the

input resistor RIN) to flow into the output resistor and/or

the output limiting ESD structure in the LTC6102. This is

a temporary condition which will cease when the LTC6102

amplifier settles into normal closed-loop operation.

When the LTC6102-1 is disabled, the internal amplifier is

also shut down, which means that the discharge rate of

the 0.1µF capacitor is very low. This is significant when the

LTC6102-1 is disabled to save power, because the recharg-

ing of the 0.1µF capacitor is a significant portion of the

overall power consumed in startup. Figure 12 shows the

discharge rate of the 0.1µF capacitor after the LTC6102-1

is shut down at room temperature.

In a system where the LTC6102-1 is disabled for short

periods, the start-up power (and therefore the average

power) can be reduced since the VREG bypass capacitor

is never significantly discharged. The time required to

charge the VREG capacitor will also be reduced, allowing

the LTC6102-1 to start-up more quickly.

2.25

8.3

2.00

VTA+

=

=

25°C

12V

8.2

1.75

8.1

1.50

8.0

VREG

1.25

7.9

1.00

7.8

EN

0.75

7.7

0.50

7.6

0.25

7.5

0

7.4

–2 0 2 4 6 8 10 12 14 16

TIME (ms)

6102 F12

Figure 12. LTC6102-1 VREG Voltage During

Bypass Capacitor Discharge when Disabled

6102fe

20

For more information www.linear.com/LTC6102

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