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MB15E06SR Просмотр технического описания (PDF) - Fujitsu

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MB15E06SR Datasheet PDF : 25 Pages
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MB15E06SR
(Continued)
• Dual modulus prescaler: 64/65 or 128/129
• Serial input 14-bit programmable reference divider: R = 3 to 16,383
• Serial input programmable divider consisting of:
- Binary 7-bit swallow counter: 0 to 127
- Binary 11-bit programmable counter: 3 to 2,047
• Software selectable charge pump current
• On-chip phase control for phase comparator
• Built-in digital locking detector circuit to detect PLL locking and unlocking.
• Operating temperature: Ta = –40 °C to +85 °C
s PIN ASSIGNMENTS
16-pin TSSOP
OSCIN
OSCout
VP
VCC
DO
GND
Xfin
fin
1
16
2
15
3
14
4
13
Top view
5
12
6
11
7
10
8
9
N.C.
N.C.
LD/fout
N.C.
PS
LE
Data
Clock
(FPT-16P-M07)
16-pad BCC
OSCIN N.C.
OSCout
VP
VCC
DO
GND
Xfin
1 16 15 14 N.C.
2
13 LD/fout
3 Top view 12 N.C.
4
11 PS
5
10 LE
6 7 8 9 Data
fin Clock
(LCC-16P-M06)
2

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