MC10E241, MC100E241
5VĄECL 8ĆBit Scannable
Register
The MC10E/100E241 is an 8-bit shiftable register. Unlike a
standard universal shift register such as the E141, the E241 features
internal data feedback organized so that the SHIFT control overrides
the HOLD/LOAD control. This enables the normal operations of
HOLD and LOAD to be toggled with a single control line without the
need for external gating. It also enables switching to scan mode with
the single SHIFT control line.
The eight inputs D0 – D7 accept parallel input data, while S-IN
accepts serial input data when in shift mode. Data is accepted a set-up
time before the positive-going edge of CLK; shifting is also
accomplished on the positive clock edge. A HIGH on the Master Reset
pin (MR) asynchronously resets all the registers to zero.
The 100 Series contains temperature compensation.
• SHIFT overrides HOLD/LOAD Control
• 1000 ps Max. CLK to Q
• Asynchronous Master Reset
• Pin-Compatible with E141
• PECL Mode Operating Range: VCC= 4.2 V to 5.7 V
with VEE= 0 V
• NECL Mode Operating Range: VCC= 0 V
with VEE= –4.2 V to –5.7 V
• Internal Input Pulldown Resistors
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• ESD Protection: > 1 KV HBM, > 75 V MM
• Moisture Sensitivity Level 1
For Additional Information, see Application Note AND8003/D
• Flammability Rating: UL–94 code V–0 @ 1/8”,
Oxygen Index 28 to 34
• Transistor Count = 529 devices
http://onsemi.com
MARKING
DIAGRAMS
MC10E241FN
AWLYYWW
PLCC–28
FN SUFFIX
CASE 776
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
28 1
MC100E241FN
AWLYYWW
28 1
ORDERING INFORMATION
Device
Package
Shipping
MC10E241FN
PLCC–28 37 Units/Rail
MC10E241FNR2 PLCC–28 500 Units/Reel
MC100E241FN
PLCC–28 37 Units/Rail
MC100E241FNR2 PLCC–28 500 Units/Reel
© Semiconductor Components Industries, LLC, 2000
1
October, 2000 – Rev. 4
Publication Order Number:
MC10E241/D