PHASE–LOCKED LOOP — LOW PASS FILTER DESIGN
(A)
PDout
VCO
R1
C
ωn =
ζ=
F(s) =
Kφ KVCO
NR1C
Nωn
2KφKVCO
1
R1sC + 1
(B)
PDout
VCO
R1
R2
C
ωn =
Kφ KVCO
NC(R1 + R2)
ζ=
0.5 ωn
ǒ R2C
+
NǓ
KφKVCO
F(s) =
R2sC + 1
(R1 + R2)sC + 1
R2
(C)
φR
R1
C
–
φV
A
VCO
+
R1
ωn =
Kφ KVCO
NCR1
ωnR2C
ζ=
2
R2
ASSUMING GAIN A IS VERY LARGE, THEN:
C
F(s) = R2sC + 1
R1sC
NOTE:
For (C), R1 is frequently split into two series resistors; each resistor is equal to R1 divided by 2. A capacitor CC is then placed from the
midpoint to ground to further filter the error pulses. The value of CC should be such that the corner frequency of this network does not
significantly affect ωn.
DEFINITIONS:
N = Total Division Ratio in Feedback Loop
Kφ (Phase Detector Gain) = VDD / 4π V/radian for PDout
Kφ (Phase Detector Gain) = VDD / 2π V/radian for φV and φR
KVCO (VCO Gain) =
2π∆fVCO
∆VVCO
For a nominal design starting point, the user might consider a damping factor ζ ≈ 0.7 and a natural loop frequency ωn ≈ (2πfR/50) where
fR is the frequency at the phase detector input. Larger ωn values result in faster loop lock times and, for similar sideband filtering, higher
fR–related VCO sidebands.
RECOMMENDED READING:
Gardner, Floyd M., Phaselock Techniques (second edition). New York, Wiley–Interscience, 1979.
Manassewitsch, Vadim, Frequency Synthesizers: Theory and Design (second edition). New York, Wiley–Interscience, 1980.
Blanchard, Alain, Phase–Locked Loops: Application to Coherent Receiver Design. New York, Wiley–Interscience, 1976.
Egan, William F., Frequency Synthesis by Phase Lock. New York, Wiley–Interscience, 1981.
Rohde, Ulrich L., Digital PLL Frequency Synthesizers Theory and Design. Englewood Cliffs, NJ, Prentice–Hall, 1983.
Berlin, Howard M., Design of Phase–Locked Loop Circuits, with Experiments. Indianapolis, Howard W. Sams and Co., 1978.
Kinley, Harold, The PLL Synthesizer Cookbook. Blue Ridge Summit, PA, Tab Books, 1980.
Seidman, Arthur H., Integrated Circuits Applications Handbook, Chapter 17, pp. 538–586. New York, John Wiley & Sons.
Fadrhons, Jan, “Design and Analyze PLLs on a Programmable Calculator,” EDN. March 5, 1980.
AN535, Phase–Locked Loop Design Fundamentals, Motorola Semiconductor Products, Inc., 1970.
AR254, Phase–Locked Loop Design Articles, Motorola Semiconductor Products, Inc., Reprinted with permission from Electronic Design,
1987.
AN1207, The MC145170 in Basic HF and VHF Oscillators, Motorola Semiconductor Products, Inc., 1992.
MC145170–1
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MOTOROLA